Evaluation of a gate capacitance in the sub-aF range for a chemical field-effect transistor with a silicon nanowire channel

Abstract

An evaluation of the gate capacitance of a field-effect transitor (FET) whose channel length and width are several ten nanometer, is a key point for sensors applications. However, experimental and precise evaluation of capacitance in the aF range or less has been extremely difficult. Here, we report an extraction of the capacitance down to 0.55 aF for a silicon FET with a nanoscale wire channel whose width and length are 15 and 50 nm, respectively. The extraction can be achieved by using a combination of four kinds of measurements: current characteristics modulated by double gates, random-telegraph-signal noise induced by trapping and detrapping of a single electron, dielectric polarization noise, and current characteristics showing Coulomb blockade at low temperature. The extraction of such a small gate capacitance enables us to evaluate electron mobility in a nanoscale wire using a classical model of current characteristics of a FET.

To be published in IEEE Trans. Nanotechnol

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• Parallel Core-Shell Metal-Dielectric-Semiconductor Germanium Nanowires for High Current Surround Gate Field Effect Transistors
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Cited by in corpus (1)

• Water Electrolysis and Energy Harvesting with 0D Ion-Sensitive Field-Effect Transistors