54 citations
- Politecnico di TorinoIT6 papers
- Tallinn University of TechnologyEE3 papers
- CEA Paris-SaclayFR1 paper
- Centre National de la Recherche ScientifiqueFR1 paper
- Commissariat à l'Énergie Atomique et aux Énergies AlternativesFR1 paper
- Laboratoire Interactions, Dynamiques et LasersFR1 paper
- Lawrence Berkeley National LaboratoryUS1 paper
- Université Paris-SaclayFR1 paper
4 papers · 1 filter
Composing Graph Theory and Deep Neural Networks to Evaluate SEU Type Soft Error Effects
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux +2
Rapidly shrinking technology node and voltage scaling increase the susceptibility of Soft Errors in digital circuits. Soft Errors are radiation-induced effects while the radiation…
The Validation of Graph Model-Based, Gate Level Low-Dimensional Feature Data for Machine Learning Applications
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux +2
As an alternative to traditional fault injection-based methodologies and to explore the applicability of modern machine learning algorithms in the field of reliability engineering,…
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux +2
The paper is proposing a methodology for modeling a gate-level netlist using a Graph Convolutional Network (GCN). The model predicts the overall functional de-rating factors of seq…
Functional Failure Rate Due to Single-Event Transients in Clock Distribution Networks
Thomas Lange, Maximilien Glorieux, Dan Alexandrescu +1
With technology scaling, lower supply voltages, and higher operating frequencies clock distribution networks become more and more vulnerable to transients faults. These faults can…