17 citations · 89 across the 31 of their papers we have counts for
31 papers
DeepVigor+: Scalable and Accurate Semi-Analytical Fault Resilience Analysis for Deep Neural Network
Mohammad Hasan Ahmadilivani, Jaan Raik, Masoud Daneshtalab +1
The growing exploitation of Machine Learning (ML) in safety-critical applications necessitates rigorous safety analysis. Hardware reliability assessment is a major concern with res…
ProAct: Progressive Training for Hybrid Clipped Activation Function to Enhance Resilience of DNNs
Seyedhamidreza Mousavi, Mohammad Hasan Ahmadilivani, Jaan Raik +2
Deep Neural Networks (DNNs) are extensively employed in safety-critical applications where ensuring hardware reliability is a primary concern. To enhance the reliability of DNNs ag…
Cost-Effective Fault Tolerance for CNNs Using Parameter Vulnerability Based Hardening and Pruning
Mohammad Hasan Ahmadilivani, Seyedhamidreza Mousavi, Jaan Raik +2
Convolutional Neural Networks (CNNs) have become integral in safety-critical applications, thus raising concerns about their fault tolerance. Conventional hardware-dependent fault…
SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators
Mahdi Taheri, Masoud Daneshtalab, Jaan Raik +5
Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for depl…
AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators
Mahdi Taheri, Natalia Cherezova, Samira Nazari +6
In this paper, we propose an architecture of a novel adaptive fault-tolerant approximate multiplier tailored for ASIC-based DNN accelerators.
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators
Mahdi Taheri, Natalia Cherezova, Mohammad Saeed Ansari +4
The stringent requirements for the Deep Neural Networks (DNNs) accelerator's reliability stand along with the need for reducing the computational burden on the hardware platforms,…
On-Chip Sensors Data Collection and Analysis for SoC Health Management
Konstantin Shibin, Maksim Jenihhin, Artur Jutman +2
Data produced by on-chip sensors in modern SoCs contains a large amount of information such as occurring faults, aging status, accumulated radiation dose, performance characteristi…
Enhancing Fault Resilience of QNNs by Selective Neuron Splitting
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik +2
The superior performance of Deep Neural Networks (DNNs) has led to their application in various aspects of human life. Safety-critical applications are no exception and impose rigo…
Special Session: Approximation and Fault Resiliency of DNN Accelerators
Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone +9
Deep Learning, and in particular, Deep Neural Network (DNN) is nowadays widely used in many scenarios, including safety-critical applications such as autonomous driving. In this co…
A Novel Fault-Tolerant Logic Style with Self-Checking Capability
Mahdi Taheri, Saeideh Sheikhpour, Ali Mahani +1
We introduce a novel logic style with self-checking capability to enhance hardware reliability at logic level. The proposed logic cells have two-rail inputs/outputs, and the functi…
APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors
Mahdi Taheri, Mohammad Hasan Ahmadilivani, Maksim Jenihhin +2
Nowadays, the extensive exploitation of Deep Neural Networks (DNNs) in safety-critical applications raises new reliability concerns. In practice, methods for fault injection by emu…
A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik +2
Artificial Intelligence (AI) and, in particular, Machine Learning (ML) have emerged to be utilized in various applications due to their capability to learn how to solve complex pro…
DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators
Mahdi Taheri, Mohammad Riazati, Mohammad Hasan Ahmadilivani +5
While the role of Deep Neural Networks (DNNs) in a wide range of safety-critical applications is expanding, emerging DNNs experience massive growth in terms of computation power. I…
DeepVigor: Vulnerability Value Ranges and Factors for DNNs' Reliability Assessment
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik +2
Deep Neural Networks (DNNs) and their accelerators are being deployed ever more frequently in safety-critical applications leading to increasing reliability concerns. A traditional…
Holistic IJTAG-based External and Internal Fault Monitoring in UAVs
Foisal Ahmed, Maksim Jenihhin
Cyber-Physical Systems (CPSs), such as Unmanned Aerial Vehicles (UAVs), use System-on-Chip (SoC) based computing platforms to perform multiple complex tasks in safety-critical appl…
Unsupervised Recycled FPGA Detection Using Symmetry Analysis
Tanvir Ahmad Tarique, Foisal Ahmed, Maksim Jenihhin +1
Recently, recycled field-programmable gate arrays (FPGAs) pose a significant hardware security problem due to the proliferation of the semiconductor supply chain. Ring oscillator (…
On BTI Aging Rejuvenation in Memory Address Decoders
Cemil Cem Gursoy, Daniel Kraak, Foisal Ahmed +3
Memory designs require timing margins to compensate for aging and fabrication process variations. With technology downscaling, aging mechanisms became more apparent, and larger mar…
Composing Graph Theory and Deep Neural Networks to Evaluate SEU Type Soft Error Effects
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux +2
Rapidly shrinking technology node and voltage scaling increase the susceptibility of Soft Errors in digital circuits. Soft Errors are radiation-induced effects while the radiation…
The Validation of Graph Model-Based, Gate Level Low-Dimensional Feature Data for Machine Learning Applications
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux +2
As an alternative to traditional fault injection-based methodologies and to explore the applicability of modern machine learning algorithms in the field of reliability engineering,…
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux +2
The paper is proposing a methodology for modeling a gate-level netlist using a Graph Convolutional Network (GCN). The model predicts the overall functional de-rating factors of seq…
Representing Gate-Level SET Faults by Multiple SEU Faults at RTL
Ahmet Cagri Bagbaba, Maksim Jenihhin, Raimund Ubar +1
The advanced complex electronic systems increasingly demand safer and more secure hardware parts. Correspondingly, fault injection became a major verification milestone for both sa…
New categories of Safe Faults in a processor-based Embedded System
C. C. Gursoy, M. Jenihhin, A. S. Oyeniran +4
The identification of safe faults (i.e., faults which are guaranteed not to produce any failure) in an electronic system is a crucial step when analyzing its dependability and its…
Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices
Xinhui Lai, Maksim Jenihhin, Georgios Selimis +3
Physical Unclonable Functions (PUFs) are gaining attention in the cryptography community because of the ability to efficiently harness the intrinsic variability in the manufacturin…
PASCAL: Timing SCA Resistant Design and Verification Flow
Xinhui Lai, Maksim Jenihhin, Jaan Raik +1
A large number of crypto accelerators are being deployed with the widespread adoption of IoT. It is vitally important that these accelerators and other security hardware IPs are pr…