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researcher

M. Kandemir

26 papers hereh-index 6921.4k citations853 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • first author1
  • middle author17
  • last author8

Across the 26 of 26 papers where every author was matched, so the position is known.

fields
  • cs.AR14
  • cs.DC6
  • cs.ET1
  • cs.OH1
  • cs.OS1
  • cs.PF1
same name
  • M. Kandemir — 40 papers, h 19
  • M. Kandemir — 8 papers, h 12
  • M. Kandemir — 5 papers, h 9
  • M. Kandemir — 3 papers, h 6
  • M. Kandemir — 3 papers, h 1
  • M. Kandemir — 1 paper, h 4

Either other researchers who publish under this name, or the same person where the external sources have not merged their records.

identity via Semantic Scholar / OpenAlex

activity
20072023
most citedSprinkler: Maximizing Resource Utilization in Many-Chip Solid State Disks

89 citations · 182 across the 26 of their papers we have counts for

collaborators
Showing 2019Show all

4 papers · 1 filter

cs.AR2019

AMOEBA: A Coarse Grained Reconfigurable Architecture for Dynamic GPU Scaling

Xianwei Cheng, Hui Zhao, Mahmut Kandemir +2

Different GPU applications exhibit varying scalability patterns with network-on-chip (NoC), coalescing, memory and control divergence, and L1 cache behavior. A GPU consists of seve…

cs.DC2019

Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing

Xianwei Cheng, Hui Zhao, Mahmut Kandemir +2

Edge computing and IoT applications are severely constrained by limited hardware resource. This makes memory consuming DNN frameworks not applicable to edge computing. Simple algor…

cs.PF2019

On a caching system with object sharing

George Kesidis, Nader Alfares, Xi Li +3

We consider a content-caching system thatis shared by a number of proxies. The cache could belocated in an edge-cloud datacenter and the proxies couldeach serve a large population…

cs.AR2019★ 1 cited

FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads

Jie Zhang, Myoungsoo Jung, Mahmut Taylan Kandemir

In this work, we propose FUSE, a novel GPU cache system that integrates spin-transfer torque magnetic random-access memory (STT-MRAM) into the on-chip L1D cache. FUSE can minimize…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.