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20172023
most citedMitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network based on Analog Resistive Synapse

113 citations · 398 across the 22 of their papers we have counts for

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Showing cs.ARShow all

14 papers · 1 filter

cs.AR2022★ 4 cited

A 14uJ/Decision Keyword Spotting Accelerator with In-SRAM-Computing and On Chip Learning for Customization

Yu-Hsiang Chiang, Tian-Sheuan Chang, Shyh Jye Jou

Keyword spotting has gained popularity as a natural way to interact with consumer devices in recent years. However, because of its always-on nature and the variety of speech, it ne…

cs.AR2022

Row-wise Accelerator for Vision Transformer

Hong-Yi Wang, Tian-Sheuan Chang

Following the success of the natural language processing, the transformer for vision applications has attracted significant attention in recent years due to its excellent performan…

cs.AR2022★ 1 cited

A Real Time Super Resolution Accelerator with Tilted Layer Fusion

An-Jung Huang, Kai-Chieh Hsu, Tian-Sheuan Chang

Deep learning based superresolution achieves high-quality results, but its heavy computational workload, large buffer, and high external memory bandwidth inhibit its usage in mobil…

cs.AR2022★ 19 cited

Hardware-Robust In-RRAM-Computing for Object Detection

Yu-Hsiang Chiang, Cheng En Ni, Yun Sung +3

In-memory computing is becoming a popular architecture for deep-learning hardware accelerators recently due to its highly parallel computing, low power, and low area cost. However,…

cs.AR2022★ 8 cited

VSCNN: Convolution Neural Network Accelerator With Vector Sparsity

Kuo-Wei Chang, Tian-Sheuan Chang

Hardware accelerator for convolution neural network (CNNs) enables real time applications of artificial intelligence technology. However, most of the accelerators only support dens…

cs.AR2022★ 43 cited

VWA: Hardware Efficient Vectorwise Accelerator for Convolutional Neural Network

Kuo-Wei Chang, Tian-Sheuan Chang

Hardware accelerators for convolution neural networks (CNNs) enable real-time applications of artificial intelligence technology. However, most of the existing designs suffer from…

cs.AR2022★ 18 cited

Efficient Accelerator for Dilated and Transposed Convolution with Decomposition

Kuo-Wei Chang, Tian-Sheuan Chang

Hardware acceleration for dilated and transposed convolution enables real time execution of related tasks like segmentation, but current designs are specific for these convolutiona…

cs.AR2022★ 2 cited

Pre-RTL DNN Hardware Evaluator With Fused Layer Support

Chih-Chyau Yang, Tian-Sheuan Chang

With the popularity of the deep neural network (DNN), hardware accelerators are demanded for real time execution. However, lengthy design process and fast evolving DNN models make…

cs.AR2022★ 4 cited

A Real Time 1280x720 Object Detection Chip With 585MB/s Memory Traffic

Kuo-Wei Chang, Hsu-Tung Shih, Tian-Sheuan Chang +4

Memory bandwidth has become the real-time bottleneck of current deep learning accelerators (DLA), particularly for high definition (HD) object detection. Under resource constraints…

cs.AR2022

PSCNN: A 885.86 TOPS/W Programmable SRAM-based Computing-In-Memory Processor for Keyword Spotting

Shu-Hung Kuo, Tian-Sheuan Chang

Computing-in-memory (CIM) has attracted significant attentions in recent years due to its massive parallelism and low power consumption. However, current CIM designs suffer from la…

cs.AR2022★ 10 cited

VSA: Reconfigurable Vectorwise Spiking Neural Network Accelerator

Hong-Han Lien, Chung-Wei Hsu, Tian-Sheuan Chang

Spiking neural networks (SNNs) that enable low-power design on edge devices have recently attracted significant research. However, the temporal characteristic of SNNs causes high l…

cs.AR2022

Zebra: Memory Bandwidth Reduction for CNN Accelerators With Zero Block Regularization of Activation Maps

Hsu-Tung Shih, Tian-Sheuan Chang

The large amount of memory bandwidth between local buffer and external DRAM has become the speedup bottleneck of CNN hardware accelerators, especially for activation maps. To reduc…

cs.AR2022★ 50 cited

Sparse Compressed Spiking Neural Network Accelerator for Object Detection

Hong-Han Lien, Tian-Sheuan Chang

Spiking neural networks (SNNs), which are inspired by the human brain, have recently gained popularity due to their relatively simple and low-power hardware for transmitting binary…

cs.AR2022★ 1 cited

BSRA: Block-based Super Resolution Accelerator with Hardware Efficient Pixel Attention

Dun-Hao Yang, Tian-Sheuan Chang

Increasingly, convolution neural network (CNN) based super resolution models have been proposed for better reconstruction results, but their large model size and complicated struct…