59 citations · 90 across the 35 of their papers we have counts for
38 papers
PICasso: An AI-Enabled Design Framework for Autonomous Optimization of Silicon Photonic Devices
Deepak Vungarala, Deniz Najafi, Abdulrahman Aljoudi +6
We present PICasso, an AI-assisted framework for automated synthesis, verification, and optimization of photonic integrated circuits (PICs) from natural-language specifications. PI…
FrequencyFormer: A Co-Designed Sensor-to-Processor Pipeline for Frequency-Domain Vision Transformer Inference
Chengwei Zhou, Ovishake Sen, Xuming Chen +5
Deploying vision transformers (ViTs) on sensor-edge systems is limited not only by on-device compute, but also by the energy and bandwidth required to transmit high-dimensional ima…
Light-Bound Transformers: Hardware-Anchored Robustness for Silicon-Photonic Computer Vision Systems
Xuming Chen, Deniz Najafi, Chengwei Zhou +6
Deploying Vision Transformers (ViTs) on near-sensor analog accelerators demands training pipelines that are explicitly aligned with device-level noise and energy constraints. We in…
GLANCE: Gaze-Led Attention Network for Compressed Edge-inference
Neeraj Solanki, Hong Ding, Sepehr Tabrizchi +4
Real-time object detection in AR/VR systems faces critical computational constraints, requiring sub-10\,ms latency within tight power budgets. Inspired by biological foveal vision,…
CacheTrap: Unveiling a Stealthier Gray-Box Trojan against LLMs
Mohaiminul Al Nahian, Abeer Matar A. Almalky, Gamana Aragonda +6
The rapid advancement of large language models (LLMs) has sparked growing interest in understanding their security vulnerabilities, particularly Trojan attacks that enable stealthy…
Certifiable Safe RLHF: Semantic Grounding and Fixed Penalty Constraint Optimization for Safer LLM Alignment
Kartik Pandit, Sourav Ganguly, Arnesh Banerjee +2
Ensuring safety is a foundational requirement for large language models (LLMs). Achieving an appropriate balance between enhancing the utility of model outputs and mitigating their…
FedChip: Federated LLM for Artificial Intelligence Accelerator Chip Design
Mahmoud Nazzal, Khoa Nguyen, Deepak Vungarala +4
AI hardware design is advancing rapidly, driven by the promise of design automation to make chip development faster, more efficient, and more accessible to a wide range of users. A…
Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics
Mehrdad Morsali, Chengwei Zhou, Deniz Najafi +7
Vision Transformers (ViTs) have emerged as a powerful architecture for computer vision tasks due to their ability to model long-range dependencies and global contextual relationshi…
EIM-TRNG: Obfuscating Deep Neural Network Weights with Encoding-in-Memory True Random Number Generator via RowHammer
Ranyang Zhou, Abeer Matar A. Almalky, Gamana Aragonda +4
True Random Number Generators (TRNGs) play a fundamental role in hardware security, cryptographic systems, and data protection. In the context of Deep NeuralNetworks (DNNs), safegu…
TPU-Gen: LLM-Driven Custom Tensor Processing Unit Generator
Deepak Vungarala, Mohammed E. Elbtity, Sumiya Syed +5
The increasing complexity and scale of Deep Neural Networks (DNNs) necessitate specialized tensor accelerators, such as Tensor Processing Units (TPUs), to meet various computationa…
LIMCA: LLM for Automating Analog In-Memory Computing Architecture Design Exploration
Deepak Vungarala, Md Hasibul Amin, Pietro Mercati +5
Resistive crossbars enabling analog In-Memory Computing (IMC) have emerged as a promising architecture for Deep Neural Network (DNN) acceleration, offering high memory bandwidth an…
Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate
Deniz Najafi, Hamza Errahmouni Barkam, Mehrdad Morsali +6
Neuro-symbolic Artificial Intelligence (AI) models, blending neural networks with symbolic AI, have facilitated transparent reasoning and context understanding without the need for…
Compromising the Intelligence of Modern DNNs: On the Effectiveness of Targeted RowPress
Ranyang Zhou, Jacqueline T. Liu, Sabbir Ahmed +2
Recent advancements in side-channel attacks have revealed the vulnerability of modern Deep Neural Networks (DNNs) to malicious adversarial weight attacks. The well-studied RowHamme…
Exploiting Boosting in Hyperdimensional Computing for Enhanced Reliability in Healthcare
SungHeon Jeong, Hamza Errahmouni Barkam, Sanggeon Yun +3
Hyperdimensional computing (HDC) enables efficient data encoding and processing in high-dimensional space, benefiting machine learning and data analysis. However, underutilization…
SPICEPilot: Navigating SPICE Code Generation and Simulation with AI Guidance
Deepak Vungarala, Sakila Alam, Arnob Ghosh +1
Large Language Models (LLMs) have shown great potential in automating code generation; however, their ability to generate accurate circuit-level SPICE code remains limited due to a…
HiRISE: High-Resolution Image Scaling for Edge ML via In-Sensor Compression and Selective ROI
Brendan Reidy, Sepehr Tabrizchi, Mohamadreza Mohammadi +3
With the rise of tiny IoT devices powered by machine learning (ML), many researchers have directed their focus toward compressing models to fit on tiny edge devices. Recent works h…
DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism
Ranyang Zhou, Jacqueline T. Liu, Nakul Kochar +3
RowHammer stands out as a prominent example, potentially the pioneering one, showcasing how a failure mechanism at the circuit level can give rise to a significant and pervasive se…
Dependability in Embedded Systems: A Survey of Fault Tolerance Methods and Software-Based Mitigation Techniques
Mohammadreza Amel Solouki, Shaahin Angizi, Massimo Violante
Fault tolerance is a critical aspect of modern computing systems, ensuring correct functionality in the presence of faults. This paper presents a comprehensive survey of fault tole…
SA-DS: A Dataset for Large Language Model-Driven AI Accelerator Design Generation
Deepak Vungarala, Mahmoud Nazzal, Mehrdad Morsali +4
In the ever-evolving landscape of Deep Neural Networks (DNN) hardware acceleration, unlocking the true potential of systolic array accelerators has long been hindered by the daunti…
Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing
Mehrdad Morsali, Brendan Reidy, Deniz Najafi +6
This paper proposes a high-performance and energy-efficient optical near-sensor accelerator for vision applications, called Lightator. Harnessing the promising efficiency offered b…
HyperSense: Hyperdimensional Intelligent Sensing for Energy-Efficient Sparse Data Processing
Sanggeon Yun, Hanning Chen, Ryozo Masukawa +6
Introducing HyperSense, our co-designed hardware and software system efficiently controls Analog-to-Digital Converter (ADC) modules' data generation rate based on object presence p…
DRAM-Locker: A General-Purpose DRAM Protection Mechanism against Adversarial DNN Weight Attacks
Ranyang Zhou, Sabbir Ahmed, Arman Roohi +2
In this work, we propose DRAM-Locker as a robust general-purpose defense mechanism that can protect DRAM against various adversarial Deep Neural Network (DNN) weight attacks affect…
Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design
Deniz Najafi, Mehrdad Morsali, Ranyang Zhou +4
As an emerging post-CMOS Field Effect Transistor, Magneto-Electric FETs (MEFETs) offer compelling design characteristics for logic and memory applications, such as high-speed switc…
OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing
Mehrdad Morsali, Sepehr Tabrizchi, Deniz Najafi +4
Targeting vision applications at the edge, in this work, we systematically explore and propose a high-performance and energy-efficient Optical In-Sensor Accelerator architecture ca…