59 citations · 90 across the 35 of their papers we have counts for
21 papers · 1 filter
GLANCE: Gaze-Led Attention Network for Compressed Edge-inference
Neeraj Solanki, Hong Ding, Sepehr Tabrizchi +4
Real-time object detection in AR/VR systems faces critical computational constraints, requiring sub-10\,ms latency within tight power budgets. Inspired by biological foveal vision,…
FedChip: Federated LLM for Artificial Intelligence Accelerator Chip Design
Mahmoud Nazzal, Khoa Nguyen, Deepak Vungarala +4
AI hardware design is advancing rapidly, driven by the promise of design automation to make chip development faster, more efficient, and more accessible to a wide range of users. A…
Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics
Mehrdad Morsali, Chengwei Zhou, Deniz Najafi +7
Vision Transformers (ViTs) have emerged as a powerful architecture for computer vision tasks due to their ability to model long-range dependencies and global contextual relationshi…
TPU-Gen: LLM-Driven Custom Tensor Processing Unit Generator
Deepak Vungarala, Mohammed E. Elbtity, Sumiya Syed +5
The increasing complexity and scale of Deep Neural Networks (DNNs) necessitate specialized tensor accelerators, such as Tensor Processing Units (TPUs), to meet various computationa…
LIMCA: LLM for Automating Analog In-Memory Computing Architecture Design Exploration
Deepak Vungarala, Md Hasibul Amin, Pietro Mercati +5
Resistive crossbars enabling analog In-Memory Computing (IMC) have emerged as a promising architecture for Deep Neural Network (DNN) acceleration, offering high memory bandwidth an…
Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate
Deniz Najafi, Hamza Errahmouni Barkam, Mehrdad Morsali +6
Neuro-symbolic Artificial Intelligence (AI) models, blending neural networks with symbolic AI, have facilitated transparent reasoning and context understanding without the need for…
Compromising the Intelligence of Modern DNNs: On the Effectiveness of Targeted RowPress
Ranyang Zhou, Jacqueline T. Liu, Sabbir Ahmed +2
Recent advancements in side-channel attacks have revealed the vulnerability of modern Deep Neural Networks (DNNs) to malicious adversarial weight attacks. The well-studied RowHamme…
SPICEPilot: Navigating SPICE Code Generation and Simulation with AI Guidance
Deepak Vungarala, Sakila Alam, Arnob Ghosh +1
Large Language Models (LLMs) have shown great potential in automating code generation; however, their ability to generate accurate circuit-level SPICE code remains limited due to a…
SA-DS: A Dataset for Large Language Model-Driven AI Accelerator Design Generation
Deepak Vungarala, Mahmoud Nazzal, Mehrdad Morsali +4
In the ever-evolving landscape of Deep Neural Networks (DNN) hardware acceleration, unlocking the true potential of systolic array accelerators has long been hindered by the daunti…
Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing
Mehrdad Morsali, Brendan Reidy, Deniz Najafi +6
This paper proposes a high-performance and energy-efficient optical near-sensor accelerator for vision applications, called Lightator. Harnessing the promising efficiency offered b…
HyperSense: Hyperdimensional Intelligent Sensing for Energy-Efficient Sparse Data Processing
Sanggeon Yun, Hanning Chen, Ryozo Masukawa +6
Introducing HyperSense, our co-designed hardware and software system efficiently controls Analog-to-Digital Converter (ADC) modules' data generation rate based on object presence p…
DRAM-Locker: A General-Purpose DRAM Protection Mechanism against Adversarial DNN Weight Attacks
Ranyang Zhou, Sabbir Ahmed, Arman Roohi +2
In this work, we propose DRAM-Locker as a robust general-purpose defense mechanism that can protect DRAM against various adversarial Deep Neural Network (DNN) weight attacks affect…
Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design
Deniz Najafi, Mehrdad Morsali, Ranyang Zhou +4
As an emerging post-CMOS Field Effect Transistor, Magneto-Electric FETs (MEFETs) offer compelling design characteristics for logic and memory applications, such as high-speed switc…
OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing
Mehrdad Morsali, Sepehr Tabrizchi, Deniz Najafi +4
Targeting vision applications at the edge, in this work, we systematically explore and propose a high-performance and energy-efficient Optical In-Sensor Accelerator architecture ca…
Threshold Breaker: Can Counter-Based RowHammer Prevention Mechanisms Truly Safeguard DRAM?
Ranyang Zhou, Jacqueline Liu, Sabbir Ahmed +3
This paper challenges the existing victim-focused counter-based RowHammer detection mechanisms by experimentally demonstrating a novel multi-sided fault injection attack technique…
DIAC: Design Exploration of Intermittent-Aware Computing Realizing Batteryless Systems
Sepehr Tabrizchi, Shaahin Angizi, Arman Roohi
Battery-powered IoT devices face challenges like cost, maintenance, and environmental sustainability, prompting the emergence of batteryless energy-harvesting systems that harness…
IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the Edge
Mehrdad Morsali, Mahmoud Nazzal, Abdallah Khreishah +1
In this paper, we propose IMA-GNN as an In-Memory Accelerator for centralized and decentralized Graph Neural Network inference, explore its potential in both settings and provide a…
A Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks
Shaahin Angizi, Mehrdad Morsali, Sepehr Tabrizchi +1
In this work, a high-speed and energy-efficient comparator-based Near-Sensor Local Binary Pattern accelerator architecture (NS-LBP) is proposed to execute a novel local binary patt…
PISA: A Binary-Weight Processing-In-Sensor Accelerator for Edge Image Processing
Shaahin Angizi, Sepehr Tabrizchi, Arman Roohi
This work proposes a Processing-In-Sensor Accelerator, namely PISA, as a flexible, energy-efficient, and high-performance solution for real-time and smart image processing in AI de…
PANDA: Processing-in-MRAM Accelerated De Bruijn Graph based DNA Assembly
Shaahin Angizi, Naima Ahmed Fahmi, Wei Zhang +1
Spurred by widening gap between data processing speed and data communication speed in Von-Neumann computing architectures, some bioinformatic applications have harnessed the comput…
Accelerating Bulk Bit-Wise X(N)OR Operation in Processing-in-DRAM Platform
Shaahin Angizi, Deliang Fan
With Von-Neumann computing architectures struggling to address computationally- and memory-intensive big data analytic task today, Processing-in-Memory (PIM) platforms are gaining…