59 citations · 90 across the 35 of their papers we have counts for
7 papers · 1 filter
CacheTrap: Unveiling a Stealthier Gray-Box Trojan against LLMs
Mohaiminul Al Nahian, Abeer Matar A. Almalky, Gamana Aragonda +6
The rapid advancement of large language models (LLMs) has sparked growing interest in understanding their security vulnerabilities, particularly Trojan attacks that enable stealthy…
Certifiable Safe RLHF: Semantic Grounding and Fixed Penalty Constraint Optimization for Safer LLM Alignment
Kartik Pandit, Sourav Ganguly, Arnesh Banerjee +2
Ensuring safety is a foundational requirement for large language models (LLMs). Achieving an appropriate balance between enhancing the utility of model outputs and mitigating their…
FedChip: Federated LLM for Artificial Intelligence Accelerator Chip Design
Mahmoud Nazzal, Khoa Nguyen, Deepak Vungarala +4
AI hardware design is advancing rapidly, driven by the promise of design automation to make chip development faster, more efficient, and more accessible to a wide range of users. A…
Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics
Mehrdad Morsali, Chengwei Zhou, Deniz Najafi +7
Vision Transformers (ViTs) have emerged as a powerful architecture for computer vision tasks due to their ability to model long-range dependencies and global contextual relationshi…
EIM-TRNG: Obfuscating Deep Neural Network Weights with Encoding-in-Memory True Random Number Generator via RowHammer
Ranyang Zhou, Abeer Matar A. Almalky, Gamana Aragonda +4
True Random Number Generators (TRNGs) play a fundamental role in hardware security, cryptographic systems, and data protection. In the context of Deep NeuralNetworks (DNNs), safegu…
TPU-Gen: LLM-Driven Custom Tensor Processing Unit Generator
Deepak Vungarala, Mohammed E. Elbtity, Sumiya Syed +5
The increasing complexity and scale of Deep Neural Networks (DNNs) necessitate specialized tensor accelerators, such as Tensor Processing Units (TPUs), to meet various computationa…
LIMCA: LLM for Automating Analog In-Memory Computing Architecture Design Exploration
Deepak Vungarala, Md Hasibul Amin, Pietro Mercati +5
Resistive crossbars enabling analog In-Memory Computing (IMC) have emerged as a promising architecture for Deep Neural Network (DNN) acceleration, offering high memory bandwidth an…