activity
20142023
most citedBadNets: Identifying Vulnerabilities in the Machine Learning Model Supply Chain

973 citations · 1.8k across the 62 of their papers we have counts for

collaborators

68 papers

cs.CV2023★ 12 cited

R-LPIPS: An Adversarially Robust Perceptual Similarity Metric

Sara Ghazanfari, Siddharth Garg, Prashanth Krishnamurthy +2

Similarity metrics have played a significant role in computer vision to capture the underlying semantics of images. In recent years, advanced similarity metrics, such as the Learne…

cs.PL2023★ 10 cited

VeriGen: A Large Language Model for Verilog Code Generation

Shailja Thakur, Baleegh Ahmad, Hammond Pearce +4

In this study, we explore the capability of Large Language Models (LLMs) to automate hardware design by generating high-quality Verilog code, a common language for designing and mo…

cs.CR2023

Differential Analysis of Triggers and Benign Features for Black-Box DNN Backdoor Detection

Hao Fu, Prashanth Krishnamurthy, Siddharth Garg +1

This paper proposes a data-efficient detection method for deep neural networks against backdoor attacks under a black-box scenario. The proposed approach is motivated by the intuit…

cs.CV2023★ 2 cited

Towards Better Certified Segmentation via Diffusion Models

Othmane Laousy, Alexandre Araujo, Guillaume Chassagnon +4

The robustness of image segmentation has been an important research topic in the past few years as segmentation models have reached production-level accuracy. However, like classif…

cs.LG2023★ 1 cited

INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search

Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan +2

Logic synthesis is the first and most vital step in chip design. This steps converts a chip specification written in a hardware description language (such as Verilog) into an optim…

cs.LG2023★ 203 cited

Chip-Chat: Challenges and Opportunities in Conversational Hardware Design

Jason Blocklove, Siddharth Garg, Ramesh Karri +1

Modern hardware design starts with specifications provided in natural language. These are then translated by hardware engineers into appropriate Hardware Description Languages (HDL…