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20162023
most citedBand-to-Band Tunneling based Ultra-Energy Efficient Silicon Neuron

57 citations · 183 across the 33 of their papers we have counts for

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6 papers · 1 filter

cs.ET2023

Schottky Barrier MOSFET Enabled Ultra-Low Power Real-Time Neuron for Neuromorphic Computing

Shubham Patil, Jayatika Sakhuja, Ajay Kumar Singh +5

Energy-efficient real-time synapses and neurons are essential to enable large-scale neuromorphic computing. In this paper, we propose and demonstrate the Schottky-Barrier MOSFET-ba…

cs.ET2021

Stochasticity Invariance Control in PrCaMnO RRAM to enable Large-Scale Stochastic Recurrent Neural Networks

Vivek Saraswat, Udayan Ganguly

Emerging non-volatile memories have been proposed for a wide range of applications from easing the von-Neumann bottleneck to neuromorphic applications. Specifically, scalable RRAMs…

cs.ET2021★ 1 cited

Exploiting the Electrothermal Timescale in PrMnO3 RRAM for a compact, clock-less neuron exhibiting biological spiking patterns

Omkar Phadke, Jayatika Sakhuja, Vivek Saraswat +1

Spiking Neural Networks (SNNs) are gaining widespread momentum in the field of neuromorphic computing. These network systems integrated with neurons and synapses provide computatio…

cs.ET2019★ 4 cited

Ultra-low Energy charge trap flash based synapse enabled by parasitic leakage mitigation

Shalini Shrivastava, Tanmay Chavan, Udayan Ganguly

Brain-inspired computation promises complex cognitive tasks at biological energy efficiencies. The brain contains synapses per neuron. Hence, ultra-low energy, high-density…

cs.ET2018

A case for multiple and parallel RRAMs as synaptic model for training SNNs

Aditya Shukla, Sidharth Prasad, Sandip Lashkare +1

To enable a dense integration of model synapses in a spiking neural networks hardware, various nano-scale devices are being considered. Such a device, besides exhibiting spike-time…

cs.ET2016★ 1 cited

Enhanced Circuit Densities in Epitaxially Defined FinFETs (EDFinFETs) over FinFETs

Sushant Mittal, Aneesh Nainani, M. C. Abraham +2

FinFET technology is prone to suffer from Line Edge Roughness (LER) based VT variation with scaling. To address this, we proposed an Epitaxially Defined (ED) FinFET (EDFinFET) as a…