11 citations · 15 across the 20 of their papers we have counts for
24 papers
FORGE: Procedural Weight Generation for Sparse MoE Inference
Chanyoung Moon, Travis Pence, Daisuke Yamada +4
We introduce FORGE (Fast On-chip Rotor Generation for Experts), a procedural weight generation system for Sparse Mixture-of-Experts (MoE) inference. Rather than storing and loading…
Pricing Time, Not Just Tokens: Latency-Aware Mechanism Design for LLM Inference
Ian McDougall, Karthikeyan Sankaralingam
The economic theory of LLM pricing treats tokens as a homogeneous commodity considering aggregate token count as the main features buyers and sellers consider. We model inference a…
Rosetta: Automating First-Principles Performance Modeling Using Multi-Agent LLMs
Karthikeyan Sankaralingam
Analytical performance models --- derivations of throughput or speedup from hardware parameters --- make claims independently verifiable and expose binding constraints, yet rarely…
PerfReasoning: How Well Do LLMs Reason on Hardware Performance?
Dan Zhao, Karthikeyan Sankaralingam, Christos Kozyrakis +1
Performance modeling is central to hardware design and software optimization, yet constructing these models requires structured reasoning about computation, data reuse, storage, an…
Beyond Static Policies: Dynamic Selection Among Modern Microarchitectural Policies
Yanxin Zhang, Ian McDougall, Junnan Li +3
Modern processors gain performance from interacting policies: prefetchers, predictors, replacement rules, and schedulers. These policies are often evaluated one at a time, yet a po…
Can LLMs Perform Technical Comprehension of Computer Architecture Papers?
Nishant Aggarwal, Aishwarya Lekshmi Chithra, Ayushi Dubal +8
Can large language models perform technical comprehension of computer architecture papers--not summarization, but structured critique that names the core mechanism, surfaces buried…
Beyond Static Policies: Exploring Dynamic Policy Selection for Single-Thread Performance Optimization
Yanxin Zhang, Ian McDougall, Junnan Li +3
For over a decade, processor design has focused on implementing sophisticated policies for various components of the out-of-order pipeline, including cache replacement and prefetch…
Computer Architecture's AlphaZero Moment: Automated Discovery in an Encircled World
Karthikeyan Sankaralingam
The end of Moore's Law and Dennard scaling has fundamentally changed the economics of computer architecture. With transistor scaling delivering diminishing returns, architectural i…
The Impact Market to Save Conference Peer Review: Decoupling Dissemination and Credentialing
Karthikeyan Sankaralingam
Top-tier academic conferences are failing under the strain of two irreconcilable roles: (1) rapid dissemination of all sound research and (2) scarce credentialing for prestige and…
Regular Expression Indexing for Log Analysis. Extended Version
Ling Zhang, Shaleen Deep, Jignesh M. Patel +1
In this paper, we present the design and architecture of REI, a novel system for indexing log data for regular expression queries. Our main contribution is an -gram-based indexi…
NeuroScalar: A Deep Learning Framework for Fast, Accurate, and In-the-Wild Cycle-Level Performance Prediction
Shayne Wadle, Yanxin Zhang, Vikas Singh +1
The evaluation of new microprocessor designs is constrained by slow, cycle-accurate simulators that rely on unrepresentative benchmark traces. This paper introduces a novel deep le…
SAHM: State-Aware Heterogeneous Multicore for Single-Thread Performance
Shayne Wadle, Karthikeyan Sankaralingam
Improving single-thread performance remains a critical challenge in modern processor design, as conventional approaches such as deeper speculation, wider pipelines, and complex out…
Agora: A System for Consumption-Based GPU Pricing
Ian McDougall, Noah Scott, Joon Huh +2
We present Agora, a lightweight system designed for cloud-based GPUs which meters a three-dimensional resource vector from commodity performance counters and prices it with a funct…
Penrose: Privacy-Preserving Performance Profiling of In-The-Wild GPUs
Ian McDougall, Michael Davies, Rahul Chatterjee +2
GPUs are the dominant platform for many important applications today including deep learning, accelerated computing, and scientific simulation. However, as the complexity of both a…
Pedagogically Motivated and Composable Open-Source RISC-V Processors for Computer Science Education
Ian McDougall, Harish Batchu, Michael Davies +1
While most instruction set architectures (ISAs) are only available to use through the purchase of a restrictive commercial license, the RISC-V ISA presents a free and open-source a…
LIMINAL: Exploring The Frontiers of LLM Decode Performance
Michael Davies, Neal Crago, Karthikeyan Sankaralingam +1
The rapid advancement of Large Language Models (LLMs) necessitates a deep understanding of their fundamental performance limits. This paper investigates the limits of LLM inference…
An Evaluation of N-Gram Selection Strategies for Regular Expression Indexing in Contemporary Text Analysis Tasks. Extended Version
Ling Zhang, Shaleen Deep, Jignesh M. Patel +1
Efficient evaluation of regular expressions (regex, for short) is crucial for text analysis, and n-gram indexes are fundamental to achieving fast regex evaluation performance. Howe…
Kitsune: Enabling Dataflow Execution on GPUs
Michael Davies, Neal Crago, Karthikeyan Sankaralingam +1
State of art DL models are growing in size and complexity, with many modern models also increasing in heterogeneity of behavior. GPUs are still the dominant platform for DL applica…
IM-Unpack: Training and Inference with Arbitrarily Low Precision Integers
Zhanpeng Zeng, Karthikeyan Sankaralingam, Vikas Singh
GEneral Matrix Multiply (GEMM) is a central operation in deep learning and corresponds to the largest chunk of the compute footprint. Therefore, improving its efficiency is an acti…
LookupFFN: Making Transformers Compute-lite for CPU inference
Zhanpeng Zeng, Michael Davies, Pranav Pulijala +2
While GPU clusters are the de facto choice for training large deep neural network (DNN) models today, several reasons including ease of workflow, security and cost have led to effo…
IPU: Flexible Hardware Introspection Units
Ian McDougall, Shayne Wadle, Harish Batchu +1
Modern chip designs are increasingly complex, making it difficult for developers to glean meaningful insights about hardware behavior while real workloads are running. Hardware int…
Violet: Architecturally Exposed Orchestration, Movement, and Placement for Generalized Deep Learning
Michael Davies, Karthikeyan Sankaralingam
Deep learning and hardware for it has garnered immense academic and industry interest in the past 5 years, with many novel proposals. However, the state-of-art remains NVIDIA's Ten…
Democratizing Design for Future Computing Platforms
Luis Ceze, Mark D. Hill, Karthikeyan Sankaralingam +1
Information and communications technology can continue to change our world. These advances will partially depend upon designs that synergistically combine software with specialized…
Open-source Hardware: Opportunities and Challenges
Gagan Gupta, Tony Nowatzki, Vinay Gangadhar +1
Innovation in hardware is slowing due to rising costs of chip design and diminishing benefits from Moore's law and Dennard scaling. Software innovation, on the other hand, is flour…