11 citations · 15 across the 20 of their papers we have counts for
12 papers · 1 filter
FORGE: Procedural Weight Generation for Sparse MoE Inference
Chanyoung Moon, Travis Pence, Daisuke Yamada +4
We introduce FORGE (Fast On-chip Rotor Generation for Experts), a procedural weight generation system for Sparse Mixture-of-Experts (MoE) inference. Rather than storing and loading…
Beyond Static Policies: Dynamic Selection Among Modern Microarchitectural Policies
Yanxin Zhang, Ian McDougall, Junnan Li +3
Modern processors gain performance from interacting policies: prefetchers, predictors, replacement rules, and schedulers. These policies are often evaluated one at a time, yet a po…
Beyond Static Policies: Exploring Dynamic Policy Selection for Single-Thread Performance Optimization
Yanxin Zhang, Ian McDougall, Junnan Li +3
For over a decade, processor design has focused on implementing sophisticated policies for various components of the out-of-order pipeline, including cache replacement and prefetch…
Computer Architecture's AlphaZero Moment: Automated Discovery in an Encircled World
Karthikeyan Sankaralingam
The end of Moore's Law and Dennard scaling has fundamentally changed the economics of computer architecture. With transistor scaling delivering diminishing returns, architectural i…
NeuroScalar: A Deep Learning Framework for Fast, Accurate, and In-the-Wild Cycle-Level Performance Prediction
Shayne Wadle, Yanxin Zhang, Vikas Singh +1
The evaluation of new microprocessor designs is constrained by slow, cycle-accurate simulators that rely on unrepresentative benchmark traces. This paper introduces a novel deep le…
Penrose: Privacy-Preserving Performance Profiling of In-The-Wild GPUs
Ian McDougall, Michael Davies, Rahul Chatterjee +2
GPUs are the dominant platform for many important applications today including deep learning, accelerated computing, and scientific simulation. However, as the complexity of both a…
Pedagogically Motivated and Composable Open-Source RISC-V Processors for Computer Science Education
Ian McDougall, Harish Batchu, Michael Davies +1
While most instruction set architectures (ISAs) are only available to use through the purchase of a restrictive commercial license, the RISC-V ISA presents a free and open-source a…
LIMINAL: Exploring The Frontiers of LLM Decode Performance
Michael Davies, Neal Crago, Karthikeyan Sankaralingam +1
The rapid advancement of Large Language Models (LLMs) necessitates a deep understanding of their fundamental performance limits. This paper investigates the limits of LLM inference…
Kitsune: Enabling Dataflow Execution on GPUs
Michael Davies, Neal Crago, Karthikeyan Sankaralingam +1
State of art DL models are growing in size and complexity, with many modern models also increasing in heterogeneity of behavior. GPUs are still the dominant platform for DL applica…
IPU: Flexible Hardware Introspection Units
Ian McDougall, Shayne Wadle, Harish Batchu +1
Modern chip designs are increasingly complex, making it difficult for developers to glean meaningful insights about hardware behavior while real workloads are running. Hardware int…
Violet: Architecturally Exposed Orchestration, Movement, and Placement for Generalized Deep Learning
Michael Davies, Karthikeyan Sankaralingam
Deep learning and hardware for it has garnered immense academic and industry interest in the past 5 years, with many novel proposals. However, the state-of-art remains NVIDIA's Ten…
Open-source Hardware: Opportunities and Challenges
Gagan Gupta, Tony Nowatzki, Vinay Gangadhar +1
Innovation in hardware is slowing due to rising costs of chip design and diminishing benefits from Moore's law and Dennard scaling. Software innovation, on the other hand, is flour…