11 citations · 15 across the 20 of their papers we have counts for
8 papers · 1 filter
FORGE: Procedural Weight Generation for Sparse MoE Inference
Chanyoung Moon, Travis Pence, Daisuke Yamada +4
We introduce FORGE (Fast On-chip Rotor Generation for Experts), a procedural weight generation system for Sparse Mixture-of-Experts (MoE) inference. Rather than storing and loading…
Pricing Time, Not Just Tokens: Latency-Aware Mechanism Design for LLM Inference
Ian McDougall, Karthikeyan Sankaralingam
The economic theory of LLM pricing treats tokens as a homogeneous commodity considering aggregate token count as the main features buyers and sellers consider. We model inference a…
Rosetta: Automating First-Principles Performance Modeling Using Multi-Agent LLMs
Karthikeyan Sankaralingam
Analytical performance models --- derivations of throughput or speedup from hardware parameters --- make claims independently verifiable and expose binding constraints, yet rarely…
PerfReasoning: How Well Do LLMs Reason on Hardware Performance?
Dan Zhao, Karthikeyan Sankaralingam, Christos Kozyrakis +1
Performance modeling is central to hardware design and software optimization, yet constructing these models requires structured reasoning about computation, data reuse, storage, an…
Beyond Static Policies: Dynamic Selection Among Modern Microarchitectural Policies
Yanxin Zhang, Ian McDougall, Junnan Li +3
Modern processors gain performance from interacting policies: prefetchers, predictors, replacement rules, and schedulers. These policies are often evaluated one at a time, yet a po…
Can LLMs Perform Technical Comprehension of Computer Architecture Papers?
Nishant Aggarwal, Aishwarya Lekshmi Chithra, Ayushi Dubal +8
Can large language models perform technical comprehension of computer architecture papers--not summarization, but structured critique that names the core mechanism, surfaces buried…
Beyond Static Policies: Exploring Dynamic Policy Selection for Single-Thread Performance Optimization
Yanxin Zhang, Ian McDougall, Junnan Li +3
For over a decade, processor design has focused on implementing sophisticated policies for various components of the out-of-order pipeline, including cache replacement and prefetch…
Computer Architecture's AlphaZero Moment: Automated Discovery in an Encircled World
Karthikeyan Sankaralingam
The end of Moore's Law and Dennard scaling has fundamentally changed the economics of computer architecture. With transistor scaling delivering diminishing returns, architectural i…