95 citations · 359 across the 21 of their papers we have counts for
6 papers · 1 filter
Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM
Vivek Seshadri, Donghyuk Lee, Thomas Mullins +7
Bitwise operations are an important component of modern day programming. Many widely-used data structures (e.g., bitmap indices in databases) rely on fast bitwise operations on lar…
The Processing Using Memory Paradigm:In-DRAM Bulk Copy, Initialization, Bitwise AND and OR
Vivek Seshadri, Onur Mutlu
In existing systems, the off-chip memory interface allows the memory controller to perform only read or write operations. Therefore, to perform any operation, the processor must fi…
Understanding and Exploiting Design-Induced Latency Variation in Modern DRAM Chips
Donghyuk Lee, Samira Khan, Lavanya Subramanian +5
Variation has been shown to exist across the cells within a modern DRAM chip. We empirically demonstrate a new form of variation that exists within a real DRAM chip, induced by the…
Simple DRAM and Virtual Memory Abstractions to Enable Highly Efficient Memory Systems
Vivek Seshadri
In most modern systems, the memory subsystem is managed and accessed at multiple different granularities at various resources. We observe that such multi-granularity management res…
Adaptive-Latency DRAM (AL-DRAM)
Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko +4
This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015. The key goal of AL-DRAM is to exploit the extra margin that is built into the D…
Tiered-Latency DRAM (TL-DRAM)
Donghyuk Lee, Yoongu Kim, Vivek Seshadri +3
This paper summarizes the idea of Tiered-Latency DRAM, which was published in HPCA 2013. The key goal of TL-DRAM is to provide low DRAM latency at low cost, a critical problem in m…