24 citations · 56 across the 7 of their papers we have counts for
3 papers · 1 filter
Logic Bug Detection and Localization Using Symbolic Quick Error Detection
Eshan Singh, David Lin, Clark Barrett +1
We present Symbolic Quick Error Detection (Symbolic QED), a structured approach for logic bug detection and localization which can be used both during pre-silicon design verificati…
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)
Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn +8
We present CLEAR (Cross-Layer Exploration for Architecting Resilience), a first of its kind framework which overcomes a major challenge in the design of digital systems that are re…
E-QED: Electrical Bug Localization During Post-Silicon Validation Enabled by Quick Error Detection and Formal Methods
Eshan Singh, Clark Barrett, Subhasish Mitra
During post-silicon validation, manufactured integrated circuits are extensively tested in actual system environments to detect design bugs. Bug localization involves identificatio…