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20152022
most citedTolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)

24 citations · 56 across the 7 of their papers we have counts for

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cs.AR2016

CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining Hardware and Software Techniques to Tolerate Soft Errors in Processor Cores

Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn +8

We present a first of its kind framework which overcomes a major challenge in the design of digital systems that are resilient to reliability failures: achieve desired resilience t…