112 citations · 347 across the 15 of their papers we have counts for
15 papers
Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies
Richard A. Gottscho, Edlyn V. Levine, Tsu-Jae King Liu +7
Semiconductor innovation drives improvements to technologies that are critical to modern society. The country that successfully accelerates semiconductor innovation is positioned t…
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors
Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Mueller +6
Hardware (HW) security issues have been emerging at an alarming rate in recent years. Transient execution attacks, in particular, pose a genuine threat to the security of modern co…
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection
Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki +6
We present a novel approach to pre-silicon verification of processor designs. The purpose of pre-silicon verification is to find logic bugs in a design at an early stage and thus a…
A Theoretical Framework for Symbolic Quick Error Detection
Florian Lonsing, Subhasish Mitra, Clark Barrett
Symbolic quick error detection (SQED) is a formal pre-silicon verification technique targeted at processor designs. It leverages bounded model checking (BMC) to check a design for…
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon +8
We present an industrial case study that demonstrates the practicality and effectiveness of Symbolic Quick Error Detection (Symbolic QED) in detecting logic design flaws (logic bug…