150 citations · 1.3k across the 73 of their papers we have counts for
30 papers · 1 filter
Evaluating Row Buffer Locality in Future Non-Volatile Main Memories
Justin Meza, Jing Li, Onur Mutlu
DRAM-based main memories have read operations that destroy the read data, and as a result, must buffer large amounts of data on each array access to keep chip costs low. Unfortunat…
Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions
Arash Tavakkol, Aasheesh Kolli, Stanko Novakovic +10
Synchronous Mirroring (SM) is a standard approach to building highly-available and fault-tolerant enterprise storage systems. SM ensures strong data consistency by maintaining mult…
Shouji: A Fast and Efficient Pre-Alignment Filter for Sequence Alignment
Mohammed Alser, Hasan Hassan, Akash Kumar +2
Motivation: The ability to generate massive amounts of sequencing data continues to overwhelm the processing capability of existing algorithms and compute infrastructures. In this…
D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput
Jeremie S. Kim, Minesh Patel, Hasan Hassan +2
We propose a new DRAM-based true random number generator (TRNG) that leverages DRAM cells as an entropy source. The key idea is to intentionally violate the DRAM access timing para…
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study
Saugata Ghose, Abdullah Giray Yağlıkçı, Raghav Gupta +9
Main memory (DRAM) consumes as much as half of the total system power in a computer today, resulting in a growing need to develop new DRAM architectures and systems that consume le…
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation
Yixin Luo, Saugata Ghose, Yu Cai +2
Compared to planar (i.e., two-dimensional) NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. Th…