activity
20122016
most citedA simple 1-byte 1-clock RC4 design and its efficient implementation in FPGA coprocessor for secured ethernet communication

6 citations · 11 across the 3 of their papers we have counts for

collaborators
Showing 2014Show all

1 paper · 1 filter

cs.AR2014★ 3 cited

Design space exploration for image processing architectures on FPGA targets

Chandrajit Pal, Avik Kotal, Asit Samanta +2

Due to the emergence of embedded applications in image and video processing, communication and cryptography, improvement of pictorial information for better human perception like d…