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20122016
most citedA simple 1-byte 1-clock RC4 design and its efficient implementation in FPGA coprocessor for secured ethernet communication

6 citations · 11 across the 3 of their papers we have counts for

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cs.AR2012★ 6 cited

A simple 1-byte 1-clock RC4 design and its efficient implementation in FPGA coprocessor for secured ethernet communication

Rourab Paul, Sangeet Saha, Jkm Sadique Uz Zaman +3

In the field of cryptography till date the 1-byte in 1-clock is the best known RC4 hardware design [1], while the 1-byte in 3clocks is the best known implementation [2,3]. The desi…