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cs.AR2024
Accelerating Boolean Constraint Propagation for Efficient SAT-Solving on FPGAs
Hariprasadh Govindasamy, Babak Esfandiari, Paulo Garcia
We present a hardware-accelerated SAT solver targeting processor/Field Programmable Gate Arrays (FPGA) SoCs. Our solution accelerates the most expensive subroutine of the Davis-Put…
cs.AR2023
FPGAs (Can Get Some) SATisfaction
Hariprasadh Godindasamy, Babak Esfandiari, Paulo Garcia
We present a hardware-accelerated SAT solver suitable for processor/Field Programmable Gate Arrays (FPGA) hybrid platforms, which have become the norm in the embedded domain. Our s…