2 papers
cs.AI2026
Simulation-Aware In-Context Policy Improvement for LLM-Aided Analog Layout Refinement
Bingyang Liu, Ziming Wei, Xiaohan Gao +1
Analog IC layout design remains a labor-intensive iterative process dominated by simulation-driven refinement. Although end-to-end layout generators accelerate initial placement an…
cs.AR2023
Post-Layout Simulation Driven Analog Circuit Sizing
Xiaohan Gao, Haoyi Zhang, Siyuan Ye +6
Post-layout simulation provides accurate guidance for analog circuit design, but post-layout performance is hard to be directly optimized at early design stages. Prior work on anal…