6 papers
PlaceReasoner-Beta: Reasoning-Driven Macro Placement and Benchmarking
Qiufeng Li, Chengxuan Wang, Rongqian Chen +6
Automated macro placement remains a fundamental challenge in VLSI physical design. Despite decades of research, existing approaches predominantly optimize hand-crafted proxy object…
Interpretable and Verifiable Hardware Generation with LLM-Driven Stepwise Refinement
You Li, Samuel Mandell, David Z. Pan
Large language models (LLMs) have achieved remarkable success in software development. However, they are susceptible to hallucinations, meaning that they can introduce subtle seman…
PDAGENT-BENCH: Characterizing, Grounding, and Architecting LLM/VLM Agents for VLSI Physical Design
Qiufeng Li, Rongqian Chen, Quan Cheng +6
Large Language Models and vision-language models have shown remarkable success in the front-end design of Very Large-Scale Integrated Circuits, yet their capabilities for VLSI phys…
AI+HW 2035: Shaping the Next Decade
Deming Chen, Jason Cong, Azalia Mirhoseini +27
Artificial intelligence (AI) and hardware (HW) are advancing at unprecedented rates, yet their trajectories have become inseparably intertwined. The global research community lacks…
HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimization
Souradip Poddar, Chia-Tung Ho, Ziming Wei +3
Conventional AI-driven AMS design automation algorithms remain constrained by their reliance on high-quality datasets to capture underlying circuit behavior, coupled with poor tran…
TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuits
Ziming Wei, Zichen Kong, Yuan Wang +2
Analog and mixed-signal circuit design remains challenging due to the shortage of high-quality data and the difficulty of embedding domain knowledge into automated flows. Tradition…