most citedA 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors

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physics.ins-det2024★ 5 cited

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment

Daniel Malagon, Gabriel Torrens, Jaume Segura +1

We present experimental results of the cross-section related to cosmic-ray irradiation at ground level for minimum-sized six-transistors (6T) and eight-transistors (8T) bit-cells S…