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20242026
most citedHiVeGen -- Hierarchical LLM-based Verilog Generation for Scalable Chip Design

1 citations · 1 across the 6 of their papers we have counts for

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cs.AR2026

LACE: Large Language Model Aided Multi-Agent Framework for Agile RISC-V Instruction Extension

Pingqing Zheng, Jiayin Qin, Fuqi Zhang +5

Domain-specific Instruction Set Architecture eXtensions (ISAX) are widely adopted in the RISC-V ecosystem to accelerate emerging workloads, but implementing and validating ISAXes a…

cs.AR2026

Bridging the Last Mile of Circuit Design: PostEDA-Bench, a Hierarchical Benchmark for PPA Convergence and DRC Fixing

Pengju Liu, Nuo Xu, Jinwei Tang +2

LLM-based agents are increasingly applied to the "last mile" of Electronic Design Automation (EDA): repairing residual sign-off Design Rule Check (DRC) violations and converging Po…