3 papers
cs.LG2025
GROOT: Graph Edge Re-growth and Partitioning for the Verification of Large Designs in Logic Synthesis
Kiran Thorat, Hongwu Peng, Yuebo Luo +8
Traditional verification methods in chip design are highly time-consuming and computationally demanding, especially for large scale circuits. Graph neural networks (GNNs) have gain…
cs.LG2025
CudaForge: An Agent Framework with Hardware Feedback for CUDA Kernel Optimization
Zijian Zhang, Rong Wang, Shiyang Li +3
Developing efficient CUDA kernels is increasingly critical for AI applications such as large-scale LLM training. However, manual kernel design is both costly and time-consuming, mo…
cs.AR2025
LLM-VeriPPA: Power, Performance, and Area Optimization aware Verilog Code Generation with Large Language Models
Kiran Thorat, Jiahui Zhao, Yaotian Liu +5
Large Language Models (LLMs) are gaining prominence in various fields, thanks to their ability to generate high- quality content from human instructions. This paper delves into the…