activity
20232026
most citedLearning to Compare Hardware Designs for High-Level Synthesis

4 citations · 5 across the 8 of their papers we have counts for

collaborators

8 papers

cs.AR2026

HySpecPro: Scalable Hypergraph Partitioning via Spectral Projection Optimization

Rongjian Liang, Zhuo Feng, Haoxing Ren

Modern VLSI designs comprise tens of billions of components, making scalable hypergraph partitioning critical for parallel and hierarchical optimization. Although multilevel partit…

cs.AR2025

Multimodal Chip Physical Design Engineer Assistant

Yun-Da Tsai, Chang-Yu Chao, Liang-Yeh Shen +7

Modern chip physical design relies heavily on Electronic Design Automation (EDA) tools, which often struggle to provide interpretable feedback or actionable guidance for improving…

cs.AI2025

Autonomous Code Evolution Meets NP-Completeness

Cunxi Yu, Rongjian Liang, Chia-Tung Ho +1

Large language models (LLMs) have recently shown strong coding abilities, enabling not only static code generation but also iterative code self-evolving through agentic frameworks.…

cs.LG2025

Learning Library Cell Representations in Vector Space

Rongjian Liang, Yi-Chen Lu, Wen-Hao Liu +1

We propose Lib2Vec, a novel self-supervised framework to efficiently learn meaningful vector representations of library cells, enabling ML models to capture essential cell semantic…

cs.LG2024★ 4 cited

Learning to Compare Hardware Designs for High-Level Synthesis

Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding +6

High-level synthesis (HLS) is an automated design process that transforms high-level code into hardware designs, enabling the rapid development of hardware accelerators. HLS relies…

cs.LG2024

Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent

Haoyu Yang, Anthony Agnesina, Haoxing Ren

Exploding predictive AI has enabled fast yet effective evaluation and decision-making in modern chip physical design flows. State-of-the-art frameworks typically include the object…

cs.AR2024★ 1 cited

BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation

Yingjie Li, Anthony Agnesina, Yanqing Zhang +2

Boolean algebraic manipulation is at the core of logic synthesis in Electronic Design Automation (EDA) design flow. Existing methods struggle to fully exploit optimization opportun…

cs.AR2023

DAG-aware Synthesis Orchestration

Yingjie Li, Mingju Liu, Mark Ren +2

The key methodologies of modern logic synthesis techniques are conducted on multi-level technology-independent representations such as And-Inverter-Graphs (AIGs) of the digital log…