1 citations · 2 across the 8 of their papers we have counts for
Showing cs.ARShow all
2 papers · 1 filter
cs.AR2026
LevelSyn: Physical-Aware Logic Synthesis via Level-Asynchronous Graph Neural Networks
Jingyi Zhou, Zhengyuan Shi, Ziyang Zheng +1
As integrated circuit technology scales into the nanometer regime, the traditional disconnect between logic synthesis and physical design has led to significant PPA (Power, Perform…
cs.AR2024
DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations
Sadaf Khan, Zhengyuan Shi, Ziyang Zheng +2
Circuit representation learning is increasingly pivotal in Electronic Design Automation (EDA), serving various downstream tasks with enhanced model efficiency and accuracy. One not…