28 citations · 73 across the 4 of their papers we have counts for
4 papers
Memory-Efficient FPGA Implementation of Stochastic Simulated Annealing
Duckgyu Shin, Naoya Onizawa, Warren J. Gross +1
Simulated annealing (SA) is a well-known algorithm for solving combinatorial optimization problems. However, the computation time of SA increases rapidly, as the size of the proble…
Enhanced Convergence in p-bit Based Simulated Annealing with Partial Deactivation for Large-Scale Combinatorial Optimization Problems
Naoya Onizawa, Takahiro Hanyu
This article critically investigates the limitations of the simulated annealing algorithm using probabilistic bits (pSA) in solving large-scale combinatorial optimization problems.…
Analog-to-Stochastic Converter Using Magnetic Tunnel Junction Devices for Vision Chips
Naoya Onizawa, Daisaku Katagiri, Warren J. Gross +1
This paper introduces an analog-to-stochastic converter using a magnetic tunnel junction (MTJ) device for vision chips based on stochastic computation. Stochastic computation has b…
GPU-accelerated simulated annealing based on p-bits with real-world device-variability modeling
Naoya Onizawa, Takahiro Hanyu
Probabilistic computing using probabilistic bits (p-bits) presents an efficient alternative to traditional CMOS logic for complex problem-solving, including simulated annealing and…