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most citedMetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs

3 citations · 3 across the 3 of their papers we have counts for

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cs.AR2024★ 3 cited

MetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs

Manar Abdelatty, Jingxiao Ma, Sherief Reda

Large Language Models (LLMs) have been applied to various hardware design tasks, including Verilog code generation, EDA tool scripting, and RTL bug fixing. Despite this extensive e…

cs.CL2024

ChipXplore: Natural Language Exploration of Hardware Designs and Libraries

Manar Abdelatty, Jacob Rosenstein, Sherief Reda

Hardware design workflows rely on Process Design Kits (PDKs) from different fabrication nodes, each containing standard cell libraries optimized for speed, power, or density. Engin…