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Large Scale Integration of Graphene Transistors for Potential Applications in the Back End of the Line
A. D. Smith, S. Vaziri, S. Rodriguez +2
A chip to wafer scale, CMOS compatible method of graphene device fabrication has been established, which can be integrated into the back end of the line (BEOL) of conventional semi…
Assessment of wafer-level transfer techniques of graphene with respect to semiconductor industry requirements
Sebastian Wittmann, Stephan Pindl, Simon Sawallich +6
Graphene is a promising candidate for future electronic applications. Manufacturing graphene-based electronic devices typically requires graphene transfer from its growth substrate…
AFM-based Hamaker Constant Determination with Blind Tip Reconstruction
Benny Ku, Ferdinandus van de Wetering, Jens Bolten +3
Particle contamination of extreme ultraviolet (EUV) photomasks is one of the numerous challenges in nanoscale semiconductor fabrication, since it can lead to systematic device fail…
Graphene coating of Nafion membranes for enhanced fuel cell performance
Jasper Ruhkopf, Ulrich Plachetka, Michael Moeller +9
Electrochemically exfoliated graphene (e-G) thin films on Nafion membranes exhibit a selective barrier effect against undesirable fuel crossover. The approach combines the…
Role of substrate surface morphology on the performance of graphene inks for flexible electronics
Jasper Ruhkopf, Simon Sawallich, Michael Nagel +6
Two-dimensional (2D) materials, such as graphene, are seen as potential candidates for fabricating electronic devices and circuits on flexible substrates. Inks or dispersions of 2D…
Zero Bias Power Detector Circuits based on MoS Field Effect Transistors on Wafer-Scale Flexible Substrates
Eros Reato, Paula Palacios, Burkay Uzlu +13
We demonstrate the design, fabrication, and characterization of wafer-scale, zero-bias power detectors based on two-dimensional MoS field effect transistors (FETs). The MoS…