17 citations · 31 across the 8 of their papers we have counts for
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cs.DC2024★ 9 cited
Exploiting long vectors with a CFD code: a co-design show case
Marc Blancafort, Roger Ferrer, Guillaume Houzeaux +2
A current trend in HPC systems is the utilization of architectures with SIMD or vector extensions to exploit data parallelism. There are several ways to take advantage of such mode…
cs.PF2024★ 1 cited
RAVE: RISC-V Analyzer of Vector Executions, a QEMU tracing plugin
Pablo Vizcaino, Filippo Mantovani, Jesus Labarta +1
Simulators are crucial during the development of a chip, like the RISC-V accelerator designed in the European Processor Initiative project. In this paper, we showcase the limitatio…