activity
20232026
most citedShort reasons for long vectors in HPC CPUs: a study based on RISC-V

17 citations · 31 across the 8 of their papers we have counts for

collaborators

8 papers

cs.ET2026

Post-Moore Technologies for Plasma Simulation: A Community Roadmap

Luca Pennati, Erik M. Åsgrim, Jeremy J. Williams +21

Plasma simulations are among the most computationally demanding scientific workloads, combining high-dimensional kinetic evolution, particle-mesh coupling, field solves, and data-i…

cs.AR2026★ 1 cited

EPAC: The Last Dance

Filippo Mantovani, Fabio Banchelli, Pablo Vizcaino +36

This paper presents EPAC, a RISC-V-based accelerator chip developed within the European Processor Initiative (EPI) as part of a multi-year, multi-partner effort to build a European…

cs.DC2025

Introducing MareNostrum5: A European pre-exascale energy-efficient system designed to serve a broad spectrum of scientific workloads

Fabio Banchelli, Marta Garcia-Gasulla, Filippo Mantovani +7

MareNostrum5 is a pre-exascale supercomputer at the Barcelona Supercomputing Center (BSC), part of the EuroHPC Joint Undertaking. With a peak performance of 314 petaflops, MareNost…

cs.DC2025★ 3 cited

Exploring RISC-V Long Vector Capabilities: A Case Study in Earth Sciences

Fabio Banchelli, David Jurado, Marta Garcia-Gasulla +1

This paper investigates the performance of Earth Sciences codes, specifically SeisSol and MiniFALL3D, on a RISC-V-based CPU featuring a long vector processing unit. The study focus…

cs.DC2024★ 9 cited

Exploiting long vectors with a CFD code: a co-design show case

Marc Blancafort, Roger Ferrer, Guillaume Houzeaux +2

A current trend in HPC systems is the utilization of architectures with SIMD or vector extensions to exploit data parallelism. There are several ways to take advantage of such mode…

cs.PF2024★ 1 cited

RAVE: RISC-V Analyzer of Vector Executions, a QEMU tracing plugin

Pablo Vizcaino, Filippo Mantovani, Jesus Labarta +1

Simulators are crucial during the development of a chip, like the RISC-V accelerator designed in the European Processor Initiative project. In this paper, we showcase the limitatio…