13 citations · 57 across the 75 of their papers we have counts for
13 papers · 2 filters
Memory-Centric Computing: Recent Advances in Processing-in-DRAM
Onur Mutlu, Ataberk Olgun, Geraldo F. Oliveira +1
Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performa…
MegIS: High-Performance, Energy-Efficient, and Low-Cost Metagenomic Analysis with In-Storage Processing
Nika Mansouri Ghiasi, Mohammad Sadrosadati, Harun Mustafa +9
Metagenomics has led to significant advances in many fields. Metagenomic analysis commonly involves the key tasks of determining the species present in a sample and their relative…
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution
Rahul Bera, Adithya Ranganathan, Joydeep Rakshit +8
Load instructions often limit instruction-level parallelism (ILP) in modern processors due to data and resource dependences they cause. Prior techniques like Load Value Prediction…
An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips
Haocong Luo, Ismail Emir Yüksel, Ataberk Olgun +3
DRAM read disturbance can break memory isolation, a fundamental property to ensure system robustness (i.e., reliability, security, safety). RowHammer and RowPress are two different…
RowPress Vulnerability in Modern DRAM Chips
Haocong Luo, Ataberk Olgun, A. Giray Yağlıkçı +6
Memory isolation is a critical property for system reliability, security, and safety. We demonstrate RowPress, a DRAM read disturbance phenomenon different from the well-known RowH…
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci +8
We experimentally analyze the computational capability of commercial off-the-shelf (COTS) DRAM chips and the robustness of these capabilities under various timing delays between DR…
AERO: Adaptive Erase Operation for Improving Lifetime and Performance of Modern NAND Flash-Based SSDs
Sungjun Cho, Beomjun Kim, Hyunuk Cho +4
This work investigates a new erase scheme in NAND flash memory to improve the lifetime and performance of modern solid-state drives (SSDs). In NAND flash memory, an erase operation…
PIM-Opt: Demystifying Distributed Optimization Algorithms on a Real-World Processing-In-Memory System
Steve Rhyner, Haocong Luo, Juan Gómez-Luna +6
Modern Machine Learning (ML) training on large-scale datasets is a very time-consuming workload. It relies on the optimization algorithm Stochastic Gradient Descent (SGD) due to it…
PUMA: Efficient and Low-Cost Memory Allocation and Alignment Support for Processing-Using-Memory Architectures
Geraldo F. Oliveira, Emanuele G. Esposito, Juan Gómez-Luna +1
Processing-using-DRAM (PUD) architectures impose a restrictive data layout and alignment for their operands, where source and destination operands (i) must reside in the same DRAM…
MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Processing
Geraldo F. Oliveira, Ataberk Olgun, Abdullah Giray Yağlıkçı +4
Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a DRAM array's massive internal parallelism to execute very-wide data-parallel operations, in a singl…
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
Ismail Emir Yuksel, Yahya Can Tugrul, Ataberk Olgun +7
Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the…
PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architectures
Christina Giannoula, Peiming Yang, Ivan Fernandez +7
Graph Neural Networks (GNNs) are emerging ML models to analyze graph-structure data. Graph Neural Network (GNN) execution involves both compute-intensive and memory-intensive kerne…
Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems
Minesh Patel, Taha Shahroodi, Aditya Manglik +4
Generational improvements to commodity DRAM throughout half a century have long solidified its prevalence as main memory across the computing industry. However, overcoming today's…