13 citations · 57 across the 75 of their papers we have counts for
83 papers
HULK: An Efficient Algorithm for Enabling Fast Bulk Bitwise Operations on Homomorphically Encrypted Data
Mayank Kabra, Phillip Widdowson, Harshita Gupta +9
A wide range of important cloud applications, e.g., database analytics, graph analytics, and genome analysis, spend a considerable amount of time performing bulk bitwise operations…
Understanding the Power Consumption of Modern High Bandwidth Memory: Experimental Analysis and Modeling Using Real HBM2 DRAM Chips
Ataberk Olgun, Spiros Galanopoulos, Andreas Kosmas Kakolyris +4
We perform the first comprehensive experimental characterization of power consumed by real HBM2 DRAM chips. Our extensive characterization yields 1) the empirical basis for develop…
MORDOR: Mitigating Overheads of Read Disturbance Preventive Operations via Elastic Refresh Scheduling
Maria Makeenkova, Ataberk Olgun, F. Nisa Bostancı +3
Modern DRAM chips are susceptible to read disturbance phenomena such as RowHammer, where repeatedly accessing (hammering) a row of DRAM cells (i.e., a DRAM row) induces bitflips in…
Terracotta: Enabling the Adoption of New DRAM Techniques via a Flexible DRAM Interface and Memory Controller
Harsh Songara, Konstantinos Kanellopoulos, F. Nisa Bostancı +6
DRAM continues to limit the performance, energy efficiency, and robustness of modern systems. Many prior works propose DRAM techniques that support in-DRAM computation, improve mem…
PipeDRAM: A Data-Transposition-Free Processing-Using-DRAM Architecture with Hardware/Software Pipelining
Geraldo F. Oliveira, Ataberk Olgun, Ismail Emir Yüksel +6
Processing-using-DRAM (PUD) architectures exploit the analog operational properties of DRAM to perform bulk bitwise Boolean and arithmetic operations inside memory arrays by organi…
CertiFlash: A Formal Verification Framework for Flash Translation Layers in Computational Solid State Drives
Harshita Gupta, Mayank Kabra, Rakesh Nadig +10
Data-intensive applications move large amounts of data from storage to the compute unit, incurring significant data movement overhead. Storage-centric computing reduces this overhe…
FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration
Geraldo F. Oliveira, Arash Tavakkol, Xiangyu Zhu +10
LLM inference is increasingly constrained by accelerator memory capacity rather than compute throughput. This constraint is especially acute in single-accelerator and small-node in…
Experimental Study on System-Level Performance Impact of Read Disturbance in Modern SSDs
Yonggon Park, Hyunuk Cho, Onur Mutlu +2
This work investigates the system-level performance impact of read disturbance in modern NAND flash-based SSDs, aiming to provide new insights that can help develop better storage…
Exploring High-Bandwidth Flash for Modern LLM Inference: Opportunities and Challenges
Dowon Son, Yonggon Park, Hyunuk Cho +5
This work investigates the potential benefits and technical challenges of using high-bandwidth flash (HBF) for large language model (LLM) inference. HBF has gained increasing atten…
Demystifying DRAM Read Disturbance: Bridging the Gap Between Experimental Characterization and Device-Level Modeling of RowHammer and RowPress Phenomena
Haocong Luo, Longda Zhou, Ataberk Olgun +5
DRAM read disturbance, like RowHammer and RowPress, is a critical robustness issue where accessing DRAM can cause unintended bitflips in other unaccessed DRAM locations. DRAM read…
Enabling Fast, Efficient, and Low-Cost Genomic and Metagenomic Analyses via Storage-Centric System Designs
Nika Mansouri Ghiasi, Onur Mutlu
Due to the challenges of analyzing and storing massive volumes of genomic and metagenomic sequence data, significant efforts have been made to accelerate (meta)genomic analyses and…
GRAINS: Storage-Aware Algorithm-Architecture Co-Design Enabling High-Performance and Low-Cost Graph-Based Genome Analysis
Nika Mansouri Ghiasi, Harun Mustafa, Talu Güloglu +8
Graph-based representations of genome sequences have emerged as a powerful approach for representing massive genomic databases in an expressive and efficient way. Despite their ben…
ColumnKeeper: Efficient Solutions to the ColumnDisturb Vulnerability in DRAM-based Systems
Andreas Kosmas Kakolyris, F. Nisa Bostanci, Ataberk Olgun +7
Modern DRAM chips are vulnerable to read disturbance phenomena such as RowHammer and RowPress, which induce bitflips after accessing nearby rows a certain number of times (the read…
Clutch: High Performance Vector-Scalar Comparison using DRAM via Chunked Temporal Coding
Daichi Tokuda, Tatsuya Kubo, Ismail Emir Yuksel +8
Vector-scalar comparison is a fundamental computation primitive that compares each element in a vector against a single scalar value. It is widely used in various data-intensive wo…
Architecture for Health Initiative (Arch4Health): Computational Challenges in Health-Related Applications and the Role of Computer Architecture in Addressing Them
Nika Mansouri Ghiasi, Konstantina Koliogeorgi, Onur Mutlu
Recent biotechnological advances enable high-throughput, low-cost, and accurate biological data generation. This wealth of data enables unique opportunities for advancing healthcar…
DejaVu: Why You Should Write to Your DRAM Rows Twice, Carefully
Haocong Luo, İsmail Emir Yüksel, Ataberk Olgun +4
We provide the first experimental demonstration of DejaVu, a phenomenon where the data previously written to DRAM cells affects DRAM's vulnerability to read disturbance. Our experi…
Ramulator 2.1: A Composable Memory System Simulator for Modern DRAM Systems
Haocong Luo, F. Nisa Bostancı, Ataberk Olgun +4
Ramulator 2.1 is a major overhaul of Ramulator 2.0 that substantially improves the simulator in three directions: 1) support of modern and emerging DRAM and memory-controller featu…
Memory-Centric Computing: Security Benefits and Challenges of Processing-in-DRAM
Ismail Emir Yuksel, F. Nisa Bostanci, Ataberk Olgun +1
Today's computing systems are processor-centric: they require frequent data movement between processing elements (e.g., CPU) and main memory (DRAM), leading to significant ineffici…
PuDGhost: Experimental Analysis of Computation Result Corruption in Processing-using-DRAM Operations on Real DRAM Chips and Implications for Future Systems
Daichi Tokuda, İsmail Emir Yüksel, Tatsuya Kubo +7
Processing-using-DRAM (PuD) is a promising computation paradigm that alleviates frequent data movement between main memory and processing units by using each DRAM column as a compu…
In-DRAM Signature Generation Using Simultaneous Multiple-Row Activation: An Experimental Study of Off-The-Shelf DRAM Chips
Umut Baser, Ismail Emir Yuksel, F. Nisa Bostanci +7
We experimentally demonstrate that it is possible to generate unique, repeatable, and device-specific signatures suitable for use as Physical Unclonable Function (PUF) responses in…
A Modern Large-Scale Memory Characterization Laboratory
Ataberk Olgun, Haocong Luo, Ismail Emir Yuksel +3
Real memory chip characterization yields insights into fundamental operational characteristics of modern memory, enabling new mechanisms that improve memory performance, robustness…
ScaleDisturb: Exploiting Temporal Asymmetry to Amplify Read Disturbance in Modern DRAM Chips
Jikun Wang, Haocong Luo, Ataberk Olgun +6
DRAM suffers from read disturbance phenomena (e.g., RowHammer and RowPress), where repeatedly accessing or continuously keeping open a DRAM row (aggressor row) induces bitflips in…
Taking Cryptography Out of the Data Path via Near-Memory Processing in DRAM
Nicola Barcarolo, Brahmaiah Gandham, Mohammad Sadrosadati +3
Cryptographic algorithms such as AES-128 and SHA-256 are fundamental to ensuring data security and integrity. Although these algorithms are computationally efficient, their perform…
HE-PIM: Demystifying Homomorphic Operations on a Real-world Processing-in-Memory System
Harshita Gupta, Mayank Kabra, Jaewoo Park +9
Homomorphic encryption (HE) enables computation over encrypted data, offering strong privacy guarantees for untrusted computing environments. Practical adoption remains limited by…