8 citations · 8 across the 4 of their papers we have counts for
4 papers
Conflict-driven Structural Learning Towards Higher Coverage Rate in ATPG
Hui-Ling Zhen, Naixing Wang, Junhua Huang +3
Due to the increasing challenges posed by the relentless rise in the design complexity of integrated circuits, Boolean Satisfiability (SAT) has emerged as a robust alternative to s…
DeepTPI: Test Point Insertion with Deep Reinforcement Learning
Zhengyuan Shi, Min Li, Sadaf Khan +4
Test point insertion (TPI) is a widely used technique for testability enhancement, especially for logic built-in self-test (LBIST) due to its relatively low fault coverage. In this…
LHNN: Lattice Hypergraph Neural Network for VLSI Congestion Prediction
Bowen Wang, Guibao Shen, Dong Li +7
Precise congestion prediction from a placement solution plays a crucial role in circuit placement. This work proposes the lattice hypergraph (LH-graph), a novel graph formulation f…
Testability-Aware Low Power Controller Design with Evolutionary Learning
Min Li, Zhengyuan Shi, Zezhong Wang +3
XORNet-based low power controller is a popular technique to reduce circuit transitions in scan-based testing. However, existing solutions construct the XORNet evenly for scan chain…