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cs.AR2025
Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits
Yibo Chen, Eren Kurshan, Dave Motschman +2
3-D integrated circuits (3-D ICs) offer performance advantages due to their increased bandwidth and reduced wire-length enabled by through-silicon-via structures (TSVs). Traditiona…
cs.AR2025
Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration
Yongxiang Liu, Yuchun Ma, Eren Kurshan +2
Most previous 3D IC research focused on stacking traditional 2D silicon layers, so the interconnect reduction is limited to inter-block delays. In this paper, we propose techniques…