63 citations · 82 across the 15 of their papers we have counts for
15 papers
David vs. Goliath: Can Small Models Win Big with Agentic AI in Hardware Design?
Shashwat Shankar, Subhranshu Pandey, Innocent Dengkhw Mochahari +4
Large Language Model(LLM) inference demands massive compute and energy, making domain-specific tasks expensive and unsustainable. As foundation models keep scaling, we ask: Is bigg…
ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search
Jitendra Bhandari, Animesh Basak Chowdhury, Mohammed Nabeel +4
Power side-channel (PSC) analysis is pivotal for securing cryptographic hardware. Prior art focused on securing gate-level netlists obtained as-is from chip design automation, negl…
Scalable Test Generation to Trigger Rare Targets in High-Level Synthesizable IPs for Cloud FPGAs
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
High-Level Synthesis (HLS) has transformed the development of complex Hardware IPs (HWIP) by offering abstraction and configurability through languages like SystemC/C++, particular…
Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS
Matthew DeLorenzo, Animesh Basak Chowdhury, Vasudev Gohil +4
Existing large language models (LLMs) for register transfer level code generation face challenges like compilation failures and suboptimal power, performance, and area (PPA) effici…
Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization
Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan +2
Logic synthesis, a pivotal stage in chip design, entails optimizing chip specifications encoded in hardware description languages like Verilog into highly efficient implementations…
Towards the Imagenets of ML4EDA
Animesh Basak Chowdhury, Shailja Thakur, Hammond Pearce +2
Despite the growing interest in ML-guided EDA tools from RTL to GDSII, there are no standard datasets or prototypical learning tasks defined for the EDA problem domain. Experience…
INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search
Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan +2
Logic synthesis is the first and most vital step in chip design. This steps converts a chip specification written in a hardware description language (such as Verilog) into an optim…
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning
Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini +5
Oracle-less machine learning (ML) attacks have broken various logic locking schemes. Regular synthesis, which is tailored for area-power-delay optimization, yields netlists where k…
GreyConE: Greybox fuzzing+Concolic execution guided test generation for high level design
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
Exhaustive testing of high-level designs pose an arduous challenge due to complex branching conditions, loop structures and inherent concurrency of hardware designs. Test engineers…
Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis
Animesh Basak Chowdhury, Benjamin Tan, Ryan Carey +3
Generating sub-optimal synthesis transformation sequences ("synthesis recipe") is an important problem in logic synthesis. Manually crafted synthesis recipes have poor quality. Sta…
FuCE: Fuzzing+Concolic Execution guided Trojan Detection in Synthesizable Hardware Designs
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
High-level synthesis (HLS) is the next emerging trend for designing complex customized architectures for applications such as Machine Learning, Video Processing. It provides a high…
OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis
Animesh Basak Chowdhury, Benjamin Tan, Ramesh Karri +1
Logic synthesis is a challenging and widely-researched combinatorial optimization problem during integrated circuit (IC) design. It transforms a high-level description of hardware…
ASSURE: RTL Locking Against an Untrusted Foundry
Christian Pilato, Animesh Basak Chowdhury, Donatella Sciuto +2
Semiconductor design companies are integrating proprietary intellectual property (IP) blocks to build custom integrated circuits (IC) and fabricate them in a third-party foundry. U…
Adversarially Robust Learning via Entropic Regularization
Gauri Jagatap, Ameya Joshi, Animesh Basak Chowdhury +2
In this paper we propose a new family of algorithms, ATENT, for training adversarially robust deep neural networks. We formulate a new loss function that is equipped with an additi…
RERS-Fuzz : Combining Greybox Fuzzing with Interval Analysis for error reachability in reactive softwares
Animesh Basak Chowdhury
Fuzz Testing is a well-studied area in the field of Software Maintenance and Evolution. In recent years, coverage-based Greybox fuzz testing has gained immense attention by discove…