36 citations · 109 across the 7 of their papers we have counts for
5 papers · 1 filter
Microarchitectural comparison and in-core modeling of state-of-the-art CPUs: Grace, Sapphire Rapids, and Genoa
Jan Laukemann, Georg Hager, Gerhard Wellein
With Nvidia's release of the Grace Superchip, all three big semiconductor companies in HPC (AMD, Intel, Nvidia) are currently competing in the race for the best CPU. In this work w…
ECM modeling and performance tuning of SpMV and Lattice QCD on A64FX
Christie Alappat, Nils Meyer, Jan Laukemann +4
The A64FX CPU is arguably the most powerful Arm-based processor design to date. Although it is a traditional cache-based multicore processor, its peak performance and memory bandwi…
Performance Modeling of Streaming Kernels and Sparse Matrix-Vector Multiplication on A64FX
Christie L. Alappat, Jan Laukemann, Thomas Gruber +4
The A64FX CPU powers the current number one supercomputer on the Top500 list. Although it is a traditional cache-based multicore processor, its peak performance and memory bandwidt…
Automatic Throughput and Critical Path Analysis of x86 and ARM Assembly Kernels
Jan Laukemann, Julian Hammer, Georg Hager +1
Useful models of loop kernel runtimes on out-of-order architectures require an analysis of the in-core performance behavior of instructions and their dependencies. While an instruc…
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures
Jan Laukemann, Julian Hammer, Johannes Hofmann +2
An accurate prediction of scheduling and execution of instruction streams is a necessary prerequisite for predicting the in-core performance behavior of throughput-bound loop kerne…