85 citations · 331 across the 24 of their papers we have counts for
9 papers · 1 filter
SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors
Lennart M. Reimann, Jonathan Wiesner, Dominik Sisejkovic +2
Despite its ever-increasing impact, security is not considered as a design objective in commercial electronic design automation (EDA) tools. This results in vulnerabilities being o…
Automated Information Flow Analysis for Integrated Computing-in-Memory Modules
Lennart M. Reimann, Felix Staudigl, Rainer Leupers
Novel non-volatile memory (NVM) technologies offer high-speed and high-density data storage. In addition, they overcome the von Neumann bottleneck by enabling computing-in-memory (…
Quantitative Information Flow for Hardware: Advancing the Attack Landscape
Lennart M. Reimann, Sarp Erdönmez, Dominik Sisejkovic +1
Security still remains an afterthought in modern Electronic Design Automation (EDA) tools, which solely focus on enhancing performance and reducing the chip size. Typically, the se…
PA-PUF: A Novel Priority Arbiter PUF
Simranjeet Singh, Srinivasu Bodapati, Sachin Patkar +3
This paper proposes a 3-input arbiter-based novel physically unclonable function (PUF) design. Firstly, a 3-input priority arbiter is designed using a simple arbiter, two multiplex…
Designing ML-Resilient Locking at Register-Transfer Level
Dominik Sisejkovic, Luca Collini, Benjamin Tan +3
Various logic-locking schemes have been proposed to protect hardware from intellectual property piracy and malicious design modifications. Since traditional locking techniques are…
QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog
Lennart M. Reimann, Luca Hanel, Dominik Sisejkovic +2
The enormous amount of code required to design modern hardware implementations often leads to critical vulnerabilities being overlooked. Especially vulnerabilities that compromise…
Deceptive Logic Locking for Hardware Integrity Protection against Machine Learning Attacks
Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann +1
Logic locking has emerged as a prominent key-driven technique to protect the integrity of integrated circuits. However, novel machine-learning-based attacks have recently been intr…
Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities
Dominik Sisejkovic, Lennart M. Reimann, Elmira Moussavi +2
In the past decade, a lot of progress has been made in the design and evaluation of logic locking; a premier technique to safeguard the integrity of integrated circuits throughout…
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach
Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann +3
Logic locking is a prominent technique to protect the integrity of hardware designs throughout the integrated circuit design and fabrication flow. However, in recent years, the sec…