192 citations · 730 across the 29 of their papers we have counts for
30 papers
PerfSAGE: Generalized Inference Performance Predictor for Arbitrary Deep Learning Models on Edge Devices
Yuji Chai, Devashree Tripathy, Chuteng Zhou +6
The ability to accurately predict deep neural network (DNN) inference performance metrics, such as latency, power, and memory footprint, for an arbitrary DNN on a target hardware p…
Thales: Formulating and Estimating Architectural Vulnerability Factors for DNN Accelerators
Abhishek Tyagi, Yiming Gan, Shaoshan Liu +3
As Deep Neural Networks (DNNs) are increasingly deployed in safety critical and privacy sensitive applications such as autonomous driving and biometric authentication, it is critic…
Restructurable Activation Networks
Kartikeya Bhardwaj, James Ward, Caleb Tung +6
Is it possible to restructure the non-linear activation functions in a deep network to create hardware-efficient models? To address this question, we propose a new paradigm called…
UDC: Unified DNAS for Compressible TinyML Models
Igor Fedorov, Ramon Matas, Hokchhay Tann +3
Deploying TinyML models on low-cost IoT hardware is very challenging, due to limited device memory capacity. Neural processing unit (NPU) hardware address the memory challenge by u…
Super-Efficient Super Resolution for Fast Adversarial Defense at the Edge
Kartikeya Bhardwaj, Dibakar Gope, James Ward +2
Autonomous systems are highly vulnerable to a variety of adversarial attacks on Deep Neural Networks (DNNs). Training-free model-agnostic defenses have recently gained popularity d…
AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator
Chuteng Zhou, Fernando Garcia Redondo, Julian Büchel +7
Always-on TinyML perception tasks in IoT applications require very high energy efficiency. Analog compute-in-memory (CiM) using non-volatile memory (NVM) promises high efficiency a…
Federated Learning Based on Dynamic Regularization
Durmus Alp Emre Acar, Yue Zhao, Ramon Matas Navarro +3
We propose a novel federated learning method for distributively training neural network models, where the server orchestrates cooperation between a subset of randomly chosen device…
S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Acceleration
Zhi-Gang Liu, Paul N. Whatmough, Yuhao Zhu +1
Exploiting sparsity is a key technique in accelerating quantized convolutional neural network (CNN) inference on mobile devices. Prior sparse CNN accelerators largely exploit un-st…
Fast and Accurate: Video Enhancement using Sparse Depth
Yu Feng, Patrick Hansen, Paul N. Whatmough +2
This paper presents a general framework to build fast and accurate algorithms for video enhancement tasks such as super-resolution, deblurring, and denoising. Essential to our fram…
Doping: A technique for efficient compression of LSTM models using sparse structured additive matrices
Urmish Thakker, Paul N. Whatmough, Zhigang Liu +2
Structured matrices, such as those derived from Kronecker products (KP), are effective at compressing neural networks, but can lead to unacceptable accuracy loss when applied to la…
AutoPilot: Automating SoC Design Space Exploration for SWaP Constrained Autonomous UAVs
Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj +6
Building domain-specific accelerators for autonomous unmanned aerial vehicles (UAVs) is challenging due to a lack of systematic methodology for designing onboard compute. Balancing…
Information contraction in noisy binary neural networks and its implications
Chuteng Zhou, Quntao Zhuang, Matthew Mattina +1
Neural networks have gained importance as the machine learning models that achieve state-of-the-art performance on large-scale image classification, object detection and natural la…
EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference
Thierry Tambe, Coleman Hooper, Lillian Pentecost +8
Transformer-based language models such as BERT provide significant accuracy improvement for a multitude of natural language processing (NLP) tasks. However, their hefty computation…
Sparse Systolic Tensor Array for Efficient CNN Hardware Acceleration
Zhi-Gang Liu, Paul N. Whatmough, Matthew Mattina
Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). Exploiting data…
Mesorasi: Architecture Support for Point Cloud Analytics via Delayed-Aggregation
Yu Feng, Boyuan Tian, Tiancheng Xu +2
Point cloud analytics is poised to become a key workload on battery-powered embedded and mobile platforms in a wide range of emerging application domains, such as autonomous drivin…
TinyLSTMs: Efficient Neural Speech Enhancement for Hearing Aids
Igor Fedorov, Marko Stamenovic, Carl Jensen +5
Modern speech enhancement algorithms achieve remarkable noise suppression by means of large recurrent neural networks (RNNs). However, large RNNs limit practical deployment in hear…
Systolic Tensor Array: An Efficient Structured-Sparse GEMM Accelerator for Mobile CNN Inference
Zhi-Gang Liu, Paul N. Whatmough, Matthew Mattina
Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). The systolic ar…
Searching for Winograd-aware Quantized Networks
Javier Fernandez-Marques, Paul N. Whatmough, Andrew Mundy +1
Lightweight architectural designs of Convolutional Neural Networks (CNNs) together with quantization have paved the way for the deployment of demanding computer vision applications…
Noisy Machines: Understanding Noisy Neural Networks and Enhancing Robustness to Analog Hardware Errors Using Distillation
Chuteng Zhou, Prad Kadambi, Matthew Mattina +1
The success of deep learning has brought forth a wave of interest in computer hardware design to better meet the high demands of neural network inference. In particular, analog com…
CHIPKIT: An agile, reusable open-source framework for rapid test chip development
Paul Whatmough, Marco Donato, Glenn Ko +3
The current trend for domain-specific architectures (DSAs) has led to renewed interest in research test chips to demonstrate new specialized hardware. Tape-outs also offer huge ped…
SMAUG: End-to-End Full-Stack Simulation Infrastructure for Deep Learning Workloads
Sam Likun Xi, Yuan Yao, Kshitij Bhardwaj +3
In recent years, there has been tremendous advances in hardware acceleration of deep neural networks. However, most of the research has focused on optimizing accelerator microarchi…
ASV: Accelerated Stereo Vision System
Yu Feng, Paul Whatmough, Yuhao Zhu
Estimating depth from stereo vision cameras, i.e., "depth from stereo", is critical to emerging intelligent applications deployed in energy- and performance-constrained devices, su…
ISP4ML: Understanding the Role of Image Signal Processing in Efficient Deep Learning Vision Systems
Patrick Hansen, Alexey Vilkin, Yury Khrustalev +4
Convolutional neural networks (CNNs) are now predominant components in a variety of computer vision (CV) systems. These systems typically include an image signal processor (ISP), e…
SpArSe: Sparse Architecture Search for CNNs on Resource-Constrained Microcontrollers
Igor Fedorov, Ryan P. Adams, Matthew Mattina +1
The vast majority of processors in the world are actually microcontroller units (MCUs), which find widespread use performing simple control tasks in applications ranging from autom…