3 citations · 7 across the 11 of their papers we have counts for
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cs.AR2023
Post-Layout Simulation Driven Analog Circuit Sizing
Xiaohan Gao, Haoyi Zhang, Siyuan Ye +6
Post-layout simulation provides accurate guidance for analog circuit design, but post-layout performance is hard to be directly optimized at early design stages. Prior work on anal…
cs.AR2023
READ: Reliability-Enhanced Accelerator Dataflow Optimization using Critical Input Pattern Reduction
Zuodong Zhang, Renjie Wei, Meng Li +3
With the rapid advancements of deep learning in recent years, hardware accelerators are continuously deployed in more and more safety-critical applications such as autonomous drivi…