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20172023
most citedAchieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference

87 citations · 809 across the 93 of their papers we have counts for

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Showing cs.ARShow all

5 papers · 1 filter

cs.AR2022★ 18 cited

Computing-In-Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Device Variations Be Disastrous?

Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi

Computing-in-Memory (CiM) architectures based on emerging non-volatile memory (NVM) devices have demonstrated great potential for deep neural network (DNN) acceleration thanks to t…

cs.AR2022

On the Reliability of Computing-in-Memory Accelerators for Deep Neural Networks

Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi

Computing-in-memory with emerging non-volatile memory (nvCiM) is shown to be a promising candidate for accelerating deep neural networks (DNNs) with high energy efficiency. However…

cs.AR2022★ 4 cited

A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Accelerators

Bingqian Lu, Zheyu Yan, Yiyu Shi +1

In view of the performance limitations of fully-decoupled designs for neural architectures and accelerators, hardware-software co-design has been emerging to fully reap the benefit…

cs.AR2021★ 16 cited

Uncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search

Zheyu Yan, Da-Cheng Juan, Xiaobo Sharon Hu +1

Emerging device-based Computing-in-memory (CiM) has been proved to be a promising candidate for high-energy efficiency deep neural network (DNN) computations. However, most emergin…

cs.AR2017★ 22 cited

Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning

Li Zhang, Bing Li, Jinglan Liu +2

At submicron manufacturing technology nodes, pro- cess variations affect circuit performance significantly. To counter these variations, engineers are reserving more timing margin…