3 citations · 5 across the 14 of their papers we have counts for
15 papers
Interface-Aware KV Cache Quantization for Dense On-Chip NVM in Long-Context LLM Decoding
Jiahao Zheng, Yifan Qin, Xiaobo Sharon Hu +1
The key-value (KV) cache is the dominant memory bottleneck in long-context large language model (LLM) decoding: every step reads it entirely, so decoding is memory-bandwidth bound.…
Probabilistic Memory for Trustworthy Edge Intelligence
Likai Pei, Jiahao Zheng, Xueji Zhao +9
Probabilistic computation plays an important role in trustworthy edge intelligence to quantify uncertainty, enhance robustness, reconstruct data, and protect privacy, but its adopt…
When Small Variations Become Big Failures: Reliability Challenges in Compute-in-Memory Neural Accelerators
Yifan Qin, Jiahao Zheng, Zheyu Yan +3
Compute-in-memory (CiM) architectures promise significant improvements in energy efficiency and throughput for deep neural network acceleration by alleviating the von Neumann bottl…
Driving Through Uncertainty: Risk-Averse Control with LLM Commonsense for Autonomous Driving under Perception Deficits
Yuting Hu, Chenhui Xu, Ruiyang Qin +4
Partial perception deficits can compromise autonomous vehicle safety by disrupting environmental understanding. Existing protocols typically default to entirely risk-avoidant actio…
NVCiM-PT: An NVCiM-assisted Prompt Tuning Framework for Edge LLMs
Ruiyang Qin, Pengyu Ren, Zheyu Yan +7
Large Language Models (LLMs) deployed on edge devices, known as edge LLMs, need to continuously fine-tune their model parameters from user-generated data under limited resource con…
Tiny-Align: Bridging Automatic Speech Recognition and Large Language Model on the Edge
Ruiyang Qin, Dancheng Liu, Gelei Xu +7
The combination of Large Language Models (LLM) and Automatic Speech Recognition (ASR), when deployed on edge devices (called edge ASR-LLM), can serve as a powerful personalized ass…
A 10.60 W 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection
Yifan Qin, Zhenge Jia, Zheyu Yan +9
This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves…
Rethinking Medical Anomaly Detection in Brain MRI: An Image Quality Assessment Perspective
Zixuan Pan, Jun Xia, Zheyu Yan +7
Reconstruction-based methods, particularly those leveraging autoencoders, have been widely adopted for anomaly detection task in brain MRI. Unlike most existing works try to improv…
PI-Whisper: Designing an Adaptive and Incremental Automatic Speech Recognition System for Edge Devices
Amir Nassereldine, Dancheng Liu, Chenhui Xu +3
Edge-based automatic speech recognition (ASR) technologies are increasingly prevalent in the development of intelligent and personalized assistants. However, resource-constrained A…
TSB: Tiny Shared Block for Efficient DNN Deployment on NVCIM Accelerators
Yifan Qin, Zheyu Yan, Zixuan Pan +3
Compute-in-memory (CIM) accelerators using non-volatile memory (NVM) devices offer promising solutions for energy-efficient and low-latency Deep Neural Network (DNN) inference exec…
Empirical Guidelines for Deploying LLMs onto Resource-constrained Edge Devices
Ruiyang Qin, Dancheng Liu, Chenhui Xu +9
The scaling laws have become the de facto guidelines for designing large language models (LLMs), but they were studied under the assumption of unlimited computing resources for bot…
Robust Implementation of Retrieval-Augmented Generation on Edge-based Computing-in-Memory Architectures
Ruiyang Qin, Zheyu Yan, Dewen Zeng +8
Large Language Models (LLMs) deployed on edge devices learn through fine-tuning and updating a certain portion of their parameters. Although such learning methods can be optimized…
FL-NAS: Towards Fairness of NAS for Resource Constrained Devices via Large Language Models
Ruiyang Qin, Yuting Hu, Zheyu Yan +3
Neural Architecture Search (NAS) has become the de fecto tools in the industry in automating the design of deep neural networks for various applications, especially those driven by…
U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators
Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi
Architectures that incorporate Computing-in-Memory (CiM) using emerging non-volatile memory (NVM) devices have become strong contenders for deep neural network (DNN) acceleration d…
Compute-in-Memory based Neural Network Accelerators for Safety-Critical Systems: Worst-Case Scenarios and Protections
Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi
Emerging non-volatile memory (NVM)-based Computing-in-Memory (CiM) architectures show substantial promise in accelerating deep neural networks (DNNs) due to their exceptional energ…