21 citations · 102 across the 10 of their papers we have counts for
10 papers
Design of a Time-to-Digital Converter ASIC and a mini-DAQ system for the Phase-2 Upgrade of the ATLAS Monitored Drift Tube detector
Yuxiang Guo, Jinhong Wang, Yu Liang +9
We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the…
Mass Production of a Trigger Data Serializer ASIC for the Upgrade of the Muon Spectrometer at the ATLAS Experiment
Jinhong Wang, Xiong Xiao, Reid Pinkham +8
The Trigger Data Serializer (TDS) is a custom ASIC designed for the upgrade of the innermost station of the endcap ATLAS Muon Spectrometer. It is a mixed-signal chip with two worki…
A Multi-Layer SEU Mitigation Strategy to Improve FPGA Design Robustness for the ATLAS Muon Spectrometer Upgrade
Xueye Hu, Jinhong Wang, Reid Pinkham +3
We present a multi-layer single-event upset mitigation strategy implemented in a low-cost Xilinx Artix-7 FPGA. The implementation is targeted for a trigger data router for the ATLA…
Design and performance of a TDC ASIC for the upgrade of the ATLAS Monitored Drift Tube detector
Yu Liang, Jinhong Wang, Xiong Xiao +16
We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a…
Development of a time-to-digital converter ASIC for the upgrade of the ATLAS Monitored Drift Tube detector
Jinhong Wang, Yu Liang, Xiong Xiao +6
The upgrade of the ATLAS muon spectrometer for high-luminosity LHC requires new trigger and readout electronics for the various elements of the detector. We present the design of a…
Design of a Trigger Data Serializer ASIC for the Upgrade of the ATLAS Forward Muon Spectrometer
Jinhong Wang, Liang Guan, J. W. Chapman +2
The small-strip Thin Gap Chamber (sTGC) will be used for both triggering and precision tracking purposes in the upgrade of the ATLAS forward muon spectrometer. Both sTGC pad and st…
A Programmable Time Alignment Scheme for Detector Signals from the Upgraded muon Spectrometer at the ATLAS Experiment
Jinhong Wang, Liang Guan, John W Chapman +2
We present a programmable time alignment scheme used in an ASIC for the ATLAS forward muon trigger development. The scheme utilizes regenerated clocks with programmable phases to c…
FPGA Implementation of a Fixed Latency Scheme in a Signal Packet Router for the Upgrade of ATLAS Forward Muon Trigger Electronics
Jinhong Wang, Xueye Hu, Thomas Schwarz +4
We propose a new fixed latency scheme for Xilinx gigabit transceivers that will be used in the upgrade of the ATLAS forward muon spectrometer at the Large Hadron Collider. The fixe…
Characterization of a Serializer ASIC chip for the upgrade of the ATLAS muon detector
Jinhong Wang, Liang Guan, Ziru Sang +4
We report on the design of a serializer ASIC to be used in the ATLAS forward muon detector for trigger data transmission. We discuss the performance of a prototype chip covering po…
Waveform Timing Performance of a 5 GS/s Fast Pulse Sampling Module with DRS4
Jinhong Wang, Shubin Liu, Qi An
We first clarify timing issues of non-uniform sampling intervals regarding a 5 GS/s fast pulse sampling module with DRS4. Calibration strategy is proposed, and as a result, the wav…