73 citations · 179 across the 9 of their papers we have counts for
19 papers
A Deeper Look into RowHammer`s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses
Lois Orosa, Abdullah Giray Yağlıkçı, Haocong Luo +6
RowHammer is a circuit-level DRAM vulnerability where repeatedly accessing (i.e., hammering) a DRAM row can cause bit flips in physically nearby rows. The RowHammer vulnerability w…
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
Lois Orosa, Yaohua Wang, Mohammad Sadrosadati +10
DRAM is the dominant main memory technology used in modern computing systems. Computing systems implement a memory controller that interfaces with DRAM via DRAM commands. DRAM exec…
Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics
Minesh Patel, Jeremie S. Kim, Taha Shahroodi +2
Increasing single-cell DRAM error rates have pushed DRAM manufacturers to adopt on-die error-correction coding (ECC), which operates entirely within a DRAM chip to improve factory…
Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques
Jeremie S. Kim, Minesh Patel, A. Giray Yaglikci +4
In order to shed more light on how RowHammer affects modern and future devices at the circuit-level, we first present an experimental characterization of RowHammer on 1580 DRAM chi…
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off
Haocong Luo, Taha Shahroodi, Hasan Hassan +5
DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM ac…
TRRespass: Exploiting the Many Sides of Target Row Refresh
Pietro Frigo, Emanuele Vannacci, Hasan Hassan +5
After a plethora of high-profile RowHammer attacks, CPU and DRAM vendors scrambled to deliver what was meant to be the definitive hardware solution against the RowHammer problem: T…