130 citations · 730 across the 33 of their papers we have counts for
8 papers · 1 filter
Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions
Arash Tavakkol, Aasheesh Kolli, Stanko Novakovic +10
Synchronous Mirroring (SM) is a standard approach to building highly-available and fault-tolerant enterprise storage systems. SM ensures strong data consistency by maintaining mult…
Shouji: A Fast and Efficient Pre-Alignment Filter for Sequence Alignment
Mohammed Alser, Hasan Hassan, Akash Kumar +2
Motivation: The ability to generate massive amounts of sequencing data continues to overwhelm the processing capability of existing algorithms and compute infrastructures. In this…
D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput
Jeremie S. Kim, Minesh Patel, Hasan Hassan +2
We propose a new DRAM-based true random number generator (TRNG) that leverages DRAM cells as an entropy source. The key idea is to intentionally violate the DRAM access timing para…
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study
Saugata Ghose, Abdullah Giray Yağlıkçı, Raghav Gupta +9
Main memory (DRAM) consumes as much as half of the total system power in a computer today, resulting in a growing need to develop new DRAM architectures and systems that consume le…
Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency
Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar +4
This paper summarizes the idea of ChargeCache, which was published in HPCA 2016 [51], and examines the work's significance and future potential. DRAM latency continues to be a crit…
SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure
Hasan Hassan, Nandita Vijaykumar, Samira Khan +6
This paper summarizes the SoftMC DRAM characterization infrastructure, which was published in HPCA 2017, and examines the work's significance and future potential. SoftMC (Soft Mem…
Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency
Kevin K. Chang, Abdullah Giray Yaglıkçı, Saugata Ghose +7
This paper summarizes our work on experimental characterization and analysis of reduced-voltage operation in modern DRAM chips, which was published in SIGMETRICS 2017, and examines…
Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips
Kevin K. Chang, Abhijith Kashyap, Hasan Hassan +7
This article summarizes key results of our work on experimental characterization and analysis of latency variation and latency-reliability trade-offs in modern DRAM chips, which wa…