Space-Charge-Limited van der Waals Spin Transistor
arXiv:2512.03306 · doi:10.1103/61lp-6slp
Abstract
Integrating semiconducting and magnetic materials could combine transistor-like operation with nonvolatility and enable architectures such as logic-in-memory. Here, we employ correlated electrical transport and scanning nitrogen-vacancy (NV) center magnetic imaging to elucidate a spin transistor concept that amalgamates vertical and lateral hopping transport inside a 2D antiferromagnetic semiconductor, mechanistically distinct from vertical tunneling devices. Our device, based on a monolayer-bilayer junction in CrSBr, displays giant, gate-tunable magnetoresistance driven by the dual action of electrostatic doping on space-charge-limited lateral conduction and interlayer exchange coupling. Moreover, we visualize a field-trainable, layer-sharing effect that selects between coherent or domain-wall reversal at the spin-flip transition, enabling multilevel, memristive conductance states. Our layer-dependent space charge mechanism for convergent electrical and magnetic control opens opportunities to address limitations in contemporary computing.
9 pages, 6 figures
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- Space-Charge-Limited van der Waals Spin Transistor