Spatially Mapping Phonon Drag in Ultrascaled 5-nm Silicon Nanowire Field-Effect Transistor Based on a Quantum Hydrodynamic Formalism

Abstract

The growing demand for better performance and lower thermal energy dissipation in nanoelectronic devices is the major driving force of the semiconductor industry's quest for future generations of nanotransistors. Over the past 15 years, the miniaturization of silicon-based nanoelectronics predicted by Moore's law has driven an aggressive scaling down of transistor structures, including materials, design, and geometries. In this regard, the electronic device community has expanded its focus to ultrascaled transistors targeting the 7 nm technology node and beyond. However, these emerging nanodevices also present thermal challenges that can limit carrier transport as a result of strong electron-phonon coupling. In this work, we investigate the physical origin of self-heating effects in an ultrascaled 5 nm silicon nanowire field-effect transistor. Based on a quantum hydrodynamic approach, we also provide an explanation of the phonon drag contribution to thermal conductivity. We report the impact of the phonon drag effect on the electrical and thermal performance of 5 nm gate-all-around silicon nanowire field-effect transistors. Our findings provide new insight into the origin of self-heating as a result of mutual electron-phonon coupling. Furthermore, we demonstrate that the phonon drag effect significantly reduces thermal conductivity by nearly 50% under high-bias conditions.

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