A computationally efficient compact model for ferroelectric FETs for the simulation of online training of neural networks
arXiv:2004.03903 · doi:10.1088/1361-6641/ab9bed
Abstract
Tri-gate ferroelectric FETs with Hf0.5Zr0.5O2 gate insulator for memory and neuromorphic applications are fabricated and characterized for multi-level operation. The conductance and threshold voltage exhibit highly linear and symmetric characteristics. A compact analytical model is developed to accurately capture FET transfer characteristics, including series resistance, coulombic scattering, and vertical field dependent mobility degradation effects, as well as the evolvement of threshold voltage and mobility with ferroelectric polarization switching. The model covers both sub-threshold and strong inversion operation. Additional measurements confirm ferroelectric switching as opposed to carrier-trapping-based memory operation. The compact model is implemented in a simulation platform for online training of deep neural networks.
Draft submitted to Semiconductor Science and Technology on 4/6/2020
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